blob: 4fb19367855aef33b5905086a385b3b4d1acf2cf [file] [log] [blame]
From 883abb10f493df4a0f87562511b67ac835b41b09 Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed, 25 Sep 2013 14:24:01 -0700
Subject: drm/i915/vlv: fix up broken precision in vlv_crtc_clock_get
With some divider values we end up with the wrong result. So remove the
intermediates (like Ville suggested in the first place) to get the right
answer.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 662c6ecbcdca1fe8a5402f6c83d98d242917a043)
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 32f8e8b81e67..2fc00349479b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5080,7 +5080,7 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
int pipe = pipe_config->cpu_transcoder;
intel_clock_t clock;
u32 mdiv;
- int refclk = 100000, fastclk, update_rate;
+ int refclk = 100000;
mutex_lock(&dev_priv->dpio_lock);
mdiv = vlv_dpio_read(dev_priv, pipe, DPIO_DIV(pipe));
@@ -5092,10 +5092,8 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
- update_rate = refclk / clock.n;
- clock.vco = update_rate * clock.m1 * clock.m2;
- fastclk = clock.vco / clock.p1 / clock.p2;
- clock.dot = (2 * fastclk);
+ clock.vco = refclk * clock.m1 * clock.m2 / clock.n;
+ clock.dot = 2 * clock.vco / (clock.p1 * clock.p2);
pipe_config->port_clock = clock.dot / 10;
}
--
1.8.5.rc3