| From 194219eba1439136d38bcf96becef558576125d7 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Wed, 21 Sep 2016 16:47:59 +0200 |
| Subject: [PATCH 164/299] clk: renesas: rcar-gen3-cpg: Always use |
| readl()/writel() |
| |
| The R-Car Gen3 CPG/MSSR driver uses a mix of clk_readl()/clk_writel() |
| and readl()/writel() to access the clock registers. Settle on the |
| generic readl()/writel(). |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Acked-by: Stephen Boyd <sboyd@codeaurora.org> |
| (cherry picked from commit 30ad3cf00e94f4a77775d851de15549099f0224e) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/clk/renesas/rcar-gen3-cpg.c | 14 +++++++------- |
| 1 file changed, 7 insertions(+), 7 deletions(-) |
| |
| --- a/drivers/clk/renesas/rcar-gen3-cpg.c |
| +++ b/drivers/clk/renesas/rcar-gen3-cpg.c |
| @@ -98,7 +98,7 @@ static int cpg_sd_clock_enable(struct cl |
| u32 val, sd_fc; |
| unsigned int i; |
| |
| - val = clk_readl(clock->reg); |
| + val = readl(clock->reg); |
| |
| sd_fc = val & CPG_SD_FC_MASK; |
| for (i = 0; i < clock->div_num; i++) |
| @@ -111,7 +111,7 @@ static int cpg_sd_clock_enable(struct cl |
| val &= ~(CPG_SD_STP_MASK); |
| val |= clock->div_table[i].val & CPG_SD_STP_MASK; |
| |
| - clk_writel(val, clock->reg); |
| + writel(val, clock->reg); |
| |
| return 0; |
| } |
| @@ -120,14 +120,14 @@ static void cpg_sd_clock_disable(struct |
| { |
| struct sd_clock *clock = to_sd_clock(hw); |
| |
| - clk_writel(clk_readl(clock->reg) | CPG_SD_STP_MASK, clock->reg); |
| + writel(readl(clock->reg) | CPG_SD_STP_MASK, clock->reg); |
| } |
| |
| static int cpg_sd_clock_is_enabled(struct clk_hw *hw) |
| { |
| struct sd_clock *clock = to_sd_clock(hw); |
| |
| - return !(clk_readl(clock->reg) & CPG_SD_STP_MASK); |
| + return !(readl(clock->reg) & CPG_SD_STP_MASK); |
| } |
| |
| static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw, |
| @@ -138,7 +138,7 @@ static unsigned long cpg_sd_clock_recalc |
| u32 val, sd_fc; |
| unsigned int i; |
| |
| - val = clk_readl(clock->reg); |
| + val = readl(clock->reg); |
| |
| sd_fc = val & CPG_SD_FC_MASK; |
| for (i = 0; i < clock->div_num; i++) |
| @@ -189,10 +189,10 @@ static int cpg_sd_clock_set_rate(struct |
| if (i >= clock->div_num) |
| return -EINVAL; |
| |
| - val = clk_readl(clock->reg); |
| + val = readl(clock->reg); |
| val &= ~(CPG_SD_STP_MASK | CPG_SD_FC_MASK); |
| val |= clock->div_table[i].val & (CPG_SD_STP_MASK | CPG_SD_FC_MASK); |
| - clk_writel(val, clock->reg); |
| + writel(val, clock->reg); |
| |
| return 0; |
| } |