blob: c4125204969a33e051f9a4d57d50a7eac206a5b5 [file] [log] [blame]
From 0c95f679c19c2ac400d8ca2ba7692dca5fe23980 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
<niklas.soderlund+renesas@ragnatech.se>
Date: Tue, 1 Nov 2016 21:12:25 +0100
Subject: [PATCH 194/299] clk: renesas: r8a7796: Add VIN clocks
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Signed-off-by: Niklas Sรถderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
(cherry picked from commit e6e3558626f6dbc16bc13587a1a981dc2446300e)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -164,6 +164,14 @@ static const struct mssr_mod_clk r8a7796
DEF_MOD("du1", 723, R8A7796_CLK_S2D1),
DEF_MOD("du0", 724, R8A7796_CLK_S2D1),
DEF_MOD("lvds", 727, R8A7796_CLK_S2D1),
+ DEF_MOD("vin7", 804, R8A7796_CLK_S0D2),
+ DEF_MOD("vin6", 805, R8A7796_CLK_S0D2),
+ DEF_MOD("vin5", 806, R8A7796_CLK_S0D2),
+ DEF_MOD("vin4", 807, R8A7796_CLK_S0D2),
+ DEF_MOD("vin3", 808, R8A7796_CLK_S0D2),
+ DEF_MOD("vin2", 809, R8A7796_CLK_S0D2),
+ DEF_MOD("vin1", 810, R8A7796_CLK_S0D2),
+ DEF_MOD("vin0", 811, R8A7796_CLK_S0D2),
DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),