patches.socfpga/0013-ARM-dts-socfpga-set-desired-i2c-clock-on-Cyclone5-an.patch

From bae526e301c40e073379cbcf7d8239905ffcaf7f Mon Sep 17 00:00:00 2001
From: Dinh Nguyen <dinguyen@kernel.org>
Date: Tue, 13 Dec 2016 16:52:11 -0600
Subject: [PATCH 013/103] ARM: dts: socfpga: set desired i2c clock on Cyclone5
 and Arria5 devkits

The I2C LCD display on the Cyclone5 and Arria5 devkits is only capable of
the standard 100 kHz clock. Set the "clock-frequency" of the I2C node
to be 100000.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
 arch/arm/boot/dts/socfpga_arria5_socdk.dts   |    8 ++++++++
 arch/arm/boot/dts/socfpga_cyclone5_socdk.dts |    8 ++++++++
 2 files changed, 16 insertions(+)

--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -98,6 +98,14 @@
 
 &i2c0 {
 	status = "okay";
+	clock-frequency = <100000>;
+
+	/*
+	 * adjust the falling times to decrease the i2c frequency to 50Khz
+	 * because the LCD module does not work at the standard 100Khz
+	 */
+	i2c-sda-falling-time-ns = <5000>;
+	i2c-scl-falling-time-ns = <5000>;
 
 	eeprom@51 {
 		compatible = "atmel,24c32";
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -98,6 +98,14 @@
 
 &i2c0 {
 	status = "okay";
+	clock-frequency = <100000>;
+
+	/*
+	 * adjust the falling times to decrease the i2c frequency to 50Khz
+	 * because the LCD module does not work at the standard 100Khz
+	 */
+	i2c-sda-falling-time-ns = <5000>;
+	i2c-scl-falling-time-ns = <5000>;
 
 	eeprom@51 {
 		compatible = "atmel,24c32";