| From be625b6c7234e180a34bcee690d64bfd52ae116d Mon Sep 17 00:00:00 2001 |
| From: Alan Tull <atull@opensource.altera.com> |
| Date: Tue, 12 Jul 2016 14:36:41 -0500 |
| Subject: [PATCH 056/103] ARM: socfpga: add bindings document for fpga bridge |
| drivers |
| |
| Add bindings documentation for Altera SOCFPGA bridges: |
| * fpga2sdram |
| * fpga2hps |
| * hps2fpga |
| * lwhps2fpga |
| |
| Signed-off-by: Alan Tull <atull@opensource.altera.com> |
| Signed-off-by: Matthew Gerlach <mgerlach@altera.com> |
| Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> |
| Acked-by: Rob Herring <robh@kernel.org> |
| Signed-off-by: Rob Herring <robh@kernel.org> |
| --- |
| Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt | 16 ++++ |
| Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt | 39 ++++++++++ |
| 2 files changed, 55 insertions(+) |
| create mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt |
| create mode 100644 Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt |
| |
| --- /dev/null |
| +++ b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt |
| @@ -0,0 +1,16 @@ |
| +Altera FPGA To SDRAM Bridge Driver |
| + |
| +Required properties: |
| +- compatible : Should contain "altr,socfpga-fpga2sdram-bridge" |
| + |
| +Optional properties: |
| +- bridge-enable : 0 if driver should disable bridge at startup |
| + 1 if driver should enable bridge at startup |
| + Default is to leave bridge in current state. |
| + |
| +Example: |
| + fpga_bridge3: fpga-bridge@ffc25080 { |
| + compatible = "altr,socfpga-fpga2sdram-bridge"; |
| + reg = <0xffc25080 0x4>; |
| + bridge-enable = <0>; |
| + }; |
| --- /dev/null |
| +++ b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt |
| @@ -0,0 +1,39 @@ |
| +Altera FPGA/HPS Bridge Driver |
| + |
| +Required properties: |
| +- regs : base address and size for AXI bridge module |
| +- compatible : Should contain one of: |
| + "altr,socfpga-lwhps2fpga-bridge", |
| + "altr,socfpga-hps2fpga-bridge", or |
| + "altr,socfpga-fpga2hps-bridge" |
| +- resets : Phandle and reset specifier for this bridge's reset |
| +- clocks : Clocks used by this module. |
| + |
| +Optional properties: |
| +- bridge-enable : 0 if driver should disable bridge at startup. |
| + 1 if driver should enable bridge at startup. |
| + Default is to leave bridge in its current state. |
| + |
| +Example: |
| + fpga_bridge0: fpga-bridge@ff400000 { |
| + compatible = "altr,socfpga-lwhps2fpga-bridge"; |
| + reg = <0xff400000 0x100000>; |
| + resets = <&rst LWHPS2FPGA_RESET>; |
| + clocks = <&l4_main_clk>; |
| + bridge-enable = <0>; |
| + }; |
| + |
| + fpga_bridge1: fpga-bridge@ff500000 { |
| + compatible = "altr,socfpga-hps2fpga-bridge"; |
| + reg = <0xff500000 0x10000>; |
| + resets = <&rst HPS2FPGA_RESET>; |
| + clocks = <&l4_main_clk>; |
| + bridge-enable = <1>; |
| + }; |
| + |
| + fpga_bridge2: fpga-bridge@ff600000 { |
| + compatible = "altr,socfpga-fpga2hps-bridge"; |
| + reg = <0xff600000 0x100000>; |
| + resets = <&rst FPGA2HPS_RESET>; |
| + clocks = <&l4_main_clk>; |
| + }; |