| From fb4488f61538f1e252c7c8c1d86f665404e9a4cb Mon Sep 17 00:00:00 2001 |
| From: Chris Brandt <chris.brandt@renesas.com> |
| Date: Tue, 14 Feb 2017 11:08:05 -0500 |
| Subject: [PATCH 023/255] clk: renesas: mstp: ensure register writes complete |
| |
| When there is no status bit, it is possible for the clock enable/disable |
| operation to have not completed by the time the driver code resumes |
| execution. This is due to the fact that write operations are sometimes |
| queued and delayed internally. Doing a read ensures the write operations |
| has completed. |
| |
| Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi") |
| Signed-off-by: Chris Brandt <chris.brandt@renesas.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
| (cherry picked from commit f59de563358eb9351b7f8f0ba2d3be2ebb70b93d) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/clk/renesas/clk-mstp.c | 6 ++++++ |
| 1 file changed, 6 insertions(+) |
| |
| --- a/drivers/clk/renesas/clk-mstp.c |
| +++ b/drivers/clk/renesas/clk-mstp.c |
| @@ -91,6 +91,12 @@ static int cpg_mstp_clock_endisable(stru |
| value |= bitmask; |
| cpg_mstp_write(group, value, group->smstpcr); |
| |
| + if (!group->mstpsr) { |
| + /* dummy read to ensure write has completed */ |
| + cpg_mstp_read(group, group->smstpcr); |
| + barrier_data(group->smstpcr); |
| + } |
| + |
| spin_unlock_irqrestore(&group->lock, flags); |
| |
| if (!enable || !group->mstpsr) |
