| From bec3c77b8b85620bdcf4c1ad26de51fa2e4fc1c4 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Tue, 31 Jan 2017 12:17:07 +0100 |
| Subject: [PATCH 055/255] iommu/ipmmu-vmsa: Restrict IOMMU Domain Geometry to |
| 32-bit address space |
| |
| Currently, the IPMMU/VMSA driver supports 32-bit I/O Virtual Addresses |
| only, and thus sets io_pgtable_cfg.ias = 32. However, it doesn't force |
| a 32-bit IOVA space through the IOMMU Domain Geometry. |
| |
| Hence if a device (e.g. SYS-DMAC) rightfully configures a 40-bit DMA |
| mask, it will still be handed out a 40-bit IOVA, outside the 32-bit IOVA |
| space, leading to out-of-bounds accesses of the PGD when mapping the |
| IOVA. |
| |
| Force a 32-bit IOMMU Domain Geometry to fix this. |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Reviewed-by: Robin Murphy <robin.murphy@arm.com> |
| Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| Signed-off-by: Joerg Roedel <jroedel@suse.de> |
| (cherry picked from commit 3b6bb5b705a4051c9899f5e3100c117c261d2742) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/iommu/ipmmu-vmsa.c | 2 ++ |
| 1 file changed, 2 insertions(+) |
| |
| --- a/drivers/iommu/ipmmu-vmsa.c |
| +++ b/drivers/iommu/ipmmu-vmsa.c |
| @@ -313,6 +313,8 @@ static int ipmmu_domain_init_context(str |
| domain->cfg.ias = 32; |
| domain->cfg.oas = 40; |
| domain->cfg.tlb = &ipmmu_gather_ops; |
| + domain->io_domain.geometry.aperture_end = DMA_BIT_MASK(32); |
| + domain->io_domain.geometry.force_aperture = true; |
| /* |
| * TODO: Add support for coherent walk through CCI with DVM and remove |
| * cache handling. For now, delegate it to the io-pgtable code. |
