| From ed99342207c376ac3b4fbd5239160f2634e24ced Mon Sep 17 00:00:00 2001 |
| From: Chris Brandt <chris.brandt@renesas.com> |
| Date: Mon, 23 Jan 2017 08:55:19 -0500 |
| Subject: [PATCH 094/255] ARM: dts: r7s72100: add ostm to device tree |
| |
| Signed-off-by: Chris Brandt <chris.brandt@renesas.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 69b5c6dceaa138859f03ca20e3adca7ddec6bae7) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r7s72100.dtsi | 18 ++++++++++++++++++ |
| 1 file changed, 18 insertions(+) |
| |
| --- a/arch/arm/boot/dts/r7s72100.dtsi |
| +++ b/arch/arm/boot/dts/r7s72100.dtsi |
| @@ -505,4 +505,22 @@ |
| cap-sdio-irq; |
| status = "disabled"; |
| }; |
| + |
| + ostm0: timer@fcfec000 { |
| + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; |
| + reg = <0xfcfec000 0x30>; |
| + interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>; |
| + clocks = <&mstp5_clks R7S72100_CLK_OSTM0>; |
| + power-domains = <&cpg_clocks>; |
| + status = "disabled"; |
| + }; |
| + |
| + ostm1: timer@fcfec400 { |
| + compatible = "renesas,r7s72100-ostm", "renesas,ostm"; |
| + reg = <0xfcfec400 0x30>; |
| + interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>; |
| + clocks = <&mstp5_clks R7S72100_CLK_OSTM1>; |
| + power-domains = <&cpg_clocks>; |
| + status = "disabled"; |
| + }; |
| }; |
