blob: 5f5558081c15ad82afaeaecd518a200054fe1596 [file] [log] [blame]
From 4fe34cb66543480fb2c72d3ab1d7e3c4d0557521 Mon Sep 17 00:00:00 2001
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Date: Sat, 22 Oct 2016 14:29:05 +0300
Subject: [PATCH 168/299] clk: renesas: r8a7796: Add VSP clocks
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
(cherry picked from commit 88ddc1f8e3674f0b71016f5461868f14a02281a2)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -150,6 +150,11 @@ static const struct mssr_mod_clk r8a7796
DEF_MOD("fcpf0", 615, R8A7796_CLK_S0D1),
DEF_MOD("fcpci0", 617, R8A7796_CLK_S0D2),
DEF_MOD("fcpcs", 619, R8A7796_CLK_S0D2),
+ DEF_MOD("vspd2", 621, R8A7796_CLK_S0D2),
+ DEF_MOD("vspd1", 622, R8A7796_CLK_S0D2),
+ DEF_MOD("vspd0", 623, R8A7796_CLK_S0D2),
+ DEF_MOD("vspb", 626, R8A7796_CLK_S0D1),
+ DEF_MOD("vspi0", 631, R8A7796_CLK_S0D1),
DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),