| From 10beaead64875c8ab8ff7e91c6f08a5a7cc654c7 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Tue, 28 Mar 2017 12:45:32 +0200 |
| Subject: [PATCH 270/286] ARM: dts: alt: Correct clock of DU1 |
| |
| The second channel of the display unit uses a different module clock |
| than the first channel. |
| |
| Fixes: 876e7fb9f418fd86 ("ARM: shmobile: r8a7794: alt: Enable VGA port") |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 7f698bf60e3a13c991577f5360f371e2a41cf40e) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r8a7794-alt.dts | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/arch/arm/boot/dts/r8a7794-alt.dts |
| +++ b/arch/arm/boot/dts/r8a7794-alt.dts |
| @@ -168,7 +168,7 @@ |
| status = "okay"; |
| |
| clocks = <&mstp7_clks R8A7794_CLK_DU0>, |
| - <&mstp7_clks R8A7794_CLK_DU0>, |
| + <&mstp7_clks R8A7794_CLK_DU1>, |
| <&x13_clk>, <&x2_clk>; |
| clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; |
| |
