| From d971bfc94cac0ec04d631ff8be5b950ae7ab37bd Mon Sep 17 00:00:00 2001 |
| From: Biju Das <biju.das@bp.renesas.com> |
| Date: Wed, 24 Jan 2018 15:42:01 +0000 |
| Subject: [PATCH 1089/1795] ARM: dts: r8a7743: Add IPMMU DT nodes |
| |
| Add the six IPMMU instances found in the r8a7743 to DT with a disabled |
| status. |
| |
| Signed-off-by: Biju Das <biju.das@bp.renesas.com> |
| Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit bbb44da0b5958e05cba96b36a354d5e9be46b1a8) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm/boot/dts/r8a7743.dtsi | 58 ++++++++++++++++++++++++++++++++++ |
| 1 file changed, 58 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi |
| index 1933aaccb874..11a1263211eb 100644 |
| --- a/arch/arm/boot/dts/r8a7743.dtsi |
| +++ b/arch/arm/boot/dts/r8a7743.dtsi |
| @@ -335,6 +335,64 @@ |
| #thermal-sensor-cells = <0>; |
| }; |
| |
| + ipmmu_sy0: mmu@e6280000 { |
| + compatible = "renesas,ipmmu-r8a7743", |
| + "renesas,ipmmu-vmsa"; |
| + reg = <0 0xe6280000 0 0x1000>; |
| + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; |
| + #iommu-cells = <1>; |
| + status = "disabled"; |
| + }; |
| + |
| + ipmmu_sy1: mmu@e6290000 { |
| + compatible = "renesas,ipmmu-r8a7743", |
| + "renesas,ipmmu-vmsa"; |
| + reg = <0 0xe6290000 0 0x1000>; |
| + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
| + #iommu-cells = <1>; |
| + status = "disabled"; |
| + }; |
| + |
| + ipmmu_ds: mmu@e6740000 { |
| + compatible = "renesas,ipmmu-r8a7743", |
| + "renesas,ipmmu-vmsa"; |
| + reg = <0 0xe6740000 0 0x1000>; |
| + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; |
| + #iommu-cells = <1>; |
| + status = "disabled"; |
| + }; |
| + |
| + ipmmu_mp: mmu@ec680000 { |
| + compatible = "renesas,ipmmu-r8a7743", |
| + "renesas,ipmmu-vmsa"; |
| + reg = <0 0xec680000 0 0x1000>; |
| + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
| + #iommu-cells = <1>; |
| + status = "disabled"; |
| + }; |
| + |
| + ipmmu_mx: mmu@fe951000 { |
| + compatible = "renesas,ipmmu-r8a7743", |
| + "renesas,ipmmu-vmsa"; |
| + reg = <0 0xfe951000 0 0x1000>; |
| + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; |
| + #iommu-cells = <1>; |
| + status = "disabled"; |
| + }; |
| + |
| + ipmmu_gp: mmu@e62a0000 { |
| + compatible = "renesas,ipmmu-r8a7743", |
| + "renesas,ipmmu-vmsa"; |
| + reg = <0 0xe62a0000 0 0x1000>; |
| + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; |
| + #iommu-cells = <1>; |
| + status = "disabled"; |
| + }; |
| + |
| icram0: sram@e63a0000 { |
| compatible = "mmio-sram"; |
| reg = <0 0xe63a0000 0 0x12000>; |
| -- |
| 2.19.0 |
| |