| From 576ce10d5a13723cd99456066585e26805e118d7 Mon Sep 17 00:00:00 2001 |
| From: Biju Das <biju.das@bp.renesas.com> |
| Date: Fri, 18 Aug 2017 15:56:01 +0100 |
| Subject: [PATCH 0311/1795] ARM: dts: r8a7745: Add GPIO support |
| |
| Describe GPIO blocks in the R8A7745 device tree. |
| |
| Signed-off-by: Biju Das <biju.das@bp.renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 3163c03ec37aef502474122b857452fb948c7596) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm/boot/dts/r8a7745.dtsi | 105 +++++++++++++++++++++++++++++++++ |
| 1 file changed, 105 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi |
| index aff90dfb8b32..18ca7ae8dd3f 100644 |
| --- a/arch/arm/boot/dts/r8a7745.dtsi |
| +++ b/arch/arm/boot/dts/r8a7745.dtsi |
| @@ -65,6 +65,111 @@ |
| resets = <&cpg 408>; |
| }; |
| |
| + gpio0: gpio@e6050000 { |
| + compatible = "renesas,gpio-r8a7745", |
| + "renesas,rcar-gen2-gpio"; |
| + reg = <0 0xe6050000 0 0x50>; |
| + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
| + #gpio-cells = <2>; |
| + gpio-controller; |
| + gpio-ranges = <&pfc 0 0 32>; |
| + #interrupt-cells = <2>; |
| + interrupt-controller; |
| + clocks = <&cpg CPG_MOD 912>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 912>; |
| + }; |
| + |
| + gpio1: gpio@e6051000 { |
| + compatible = "renesas,gpio-r8a7745", |
| + "renesas,rcar-gen2-gpio"; |
| + reg = <0 0xe6051000 0 0x50>; |
| + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
| + #gpio-cells = <2>; |
| + gpio-controller; |
| + gpio-ranges = <&pfc 0 32 26>; |
| + #interrupt-cells = <2>; |
| + interrupt-controller; |
| + clocks = <&cpg CPG_MOD 911>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 911>; |
| + }; |
| + |
| + gpio2: gpio@e6052000 { |
| + compatible = "renesas,gpio-r8a7745", |
| + "renesas,rcar-gen2-gpio"; |
| + reg = <0 0xe6052000 0 0x50>; |
| + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
| + #gpio-cells = <2>; |
| + gpio-controller; |
| + gpio-ranges = <&pfc 0 64 32>; |
| + #interrupt-cells = <2>; |
| + interrupt-controller; |
| + clocks = <&cpg CPG_MOD 910>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 910>; |
| + }; |
| + |
| + gpio3: gpio@e6053000 { |
| + compatible = "renesas,gpio-r8a7745", |
| + "renesas,rcar-gen2-gpio"; |
| + reg = <0 0xe6053000 0 0x50>; |
| + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
| + #gpio-cells = <2>; |
| + gpio-controller; |
| + gpio-ranges = <&pfc 0 96 32>; |
| + #interrupt-cells = <2>; |
| + interrupt-controller; |
| + clocks = <&cpg CPG_MOD 909>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 909>; |
| + }; |
| + |
| + gpio4: gpio@e6054000 { |
| + compatible = "renesas,gpio-r8a7745", |
| + "renesas,rcar-gen2-gpio"; |
| + reg = <0 0xe6054000 0 0x50>; |
| + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
| + #gpio-cells = <2>; |
| + gpio-controller; |
| + gpio-ranges = <&pfc 0 128 32>; |
| + #interrupt-cells = <2>; |
| + interrupt-controller; |
| + clocks = <&cpg CPG_MOD 908>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 908>; |
| + }; |
| + |
| + gpio5: gpio@e6055000 { |
| + compatible = "renesas,gpio-r8a7745", |
| + "renesas,rcar-gen2-gpio"; |
| + reg = <0 0xe6055000 0 0x50>; |
| + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| + #gpio-cells = <2>; |
| + gpio-controller; |
| + gpio-ranges = <&pfc 0 160 28>; |
| + #interrupt-cells = <2>; |
| + interrupt-controller; |
| + clocks = <&cpg CPG_MOD 907>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 907>; |
| + }; |
| + |
| + gpio6: gpio@e6055400 { |
| + compatible = "renesas,gpio-r8a7745", |
| + "renesas,rcar-gen2-gpio"; |
| + reg = <0 0xe6055400 0 0x50>; |
| + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
| + #gpio-cells = <2>; |
| + gpio-controller; |
| + gpio-ranges = <&pfc 0 192 26>; |
| + #interrupt-cells = <2>; |
| + interrupt-controller; |
| + clocks = <&cpg CPG_MOD 905>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 905>; |
| + }; |
| + |
| irqc: interrupt-controller@e61c0000 { |
| compatible = "renesas,irqc-r8a7745", "renesas,irqc"; |
| #interrupt-cells = <2>; |
| -- |
| 2.19.0 |
| |