| From 9354b4e81df0df6e48729786dfbf27ceed3043f2 Mon Sep 17 00:00:00 2001 |
| From: Biju Das <biju.das@bp.renesas.com> |
| Date: Mon, 9 Oct 2017 14:58:57 +0100 |
| Subject: [PATCH 0359/1795] ARM: dts: r8a7745: Add internal PCI bridge nodes |
| |
| Add device nodes for the r8a7745 internal PCI bridge devices. |
| |
| Signed-off-by: Biju Das <biju.das@bp.renesas.com> |
| Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit ab290a32925e6f7db9e71546098077b3e72cc617) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm/boot/dts/r8a7745.dtsi | 46 ++++++++++++++++++++++++++++++++++ |
| 1 file changed, 46 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi |
| index 6ba3b8b04edb..b4e9536a84d6 100644 |
| --- a/arch/arm/boot/dts/r8a7745.dtsi |
| +++ b/arch/arm/boot/dts/r8a7745.dtsi |
| @@ -845,6 +845,52 @@ |
| resets = <&cpg 311>; |
| status = "disabled"; |
| }; |
| + |
| + pci0: pci@ee090000 { |
| + compatible = "renesas,pci-r8a7745", |
| + "renesas,pci-rcar-gen2"; |
| + device_type = "pci"; |
| + reg = <0 0xee090000 0 0xc00>, |
| + <0 0xee080000 0 0x1100>; |
| + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 703>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 703>; |
| + status = "disabled"; |
| + |
| + bus-range = <0 0>; |
| + #address-cells = <3>; |
| + #size-cells = <2>; |
| + #interrupt-cells = <1>; |
| + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; |
| + interrupt-map-mask = <0xff00 0 0 0x7>; |
| + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
| + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
| + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
| + }; |
| + |
| + pci1: pci@ee0d0000 { |
| + compatible = "renesas,pci-r8a7745", |
| + "renesas,pci-rcar-gen2"; |
| + device_type = "pci"; |
| + reg = <0 0xee0d0000 0 0xc00>, |
| + <0 0xee0c0000 0 0x1100>; |
| + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 703>; |
| + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; |
| + resets = <&cpg 703>; |
| + status = "disabled"; |
| + |
| + bus-range = <1 1>; |
| + #address-cells = <3>; |
| + #size-cells = <2>; |
| + #interrupt-cells = <1>; |
| + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; |
| + interrupt-map-mask = <0xff00 0 0 0x7>; |
| + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
| + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
| + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
| + }; |
| }; |
| |
| /* External root clock */ |
| -- |
| 2.19.0 |
| |
