| From 53dfbbf8185d5d03e662f2117fa3976559b16ebc Mon Sep 17 00:00:00 2001 |
| From: Simon Horman <horms+renesas@verge.net.au> |
| Date: Mon, 18 Dec 2017 22:32:33 +0100 |
| Subject: [PATCH 0736/1795] ARM: dts: r8a7792: move timer node out of bus |
| |
| The timer node does not have any register properties and thus shouldn't be |
| placed on the bus. |
| |
| This problem is flagged by the compiler as follows: |
| $ make dtbs W=1 |
| ... |
| DTC arch/arm/boot/dts/r8a7792-wheat.dtb |
| arch/arm/boot/dts/r8a7792-blanche.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property |
| arch/arm/boot/dts/r8a7792-wheat.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property |
| |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| (cherry picked from commit 3da25909eadbc5ae8dcdec77b19dd1c893d64813) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm/boot/dts/r8a7792.dtsi | 20 ++++++++------------ |
| 1 file changed, 8 insertions(+), 12 deletions(-) |
| |
| diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi |
| index c063cd3f268e..3be15a158bad 100644 |
| --- a/arch/arm/boot/dts/r8a7792.dtsi |
| +++ b/arch/arm/boot/dts/r8a7792.dtsi |
| @@ -137,18 +137,6 @@ |
| resets = <&cpg 407>; |
| }; |
| |
| - timer { |
| - compatible = "arm,armv7-timer"; |
| - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | |
| - IRQ_TYPE_LEVEL_LOW)>, |
| - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | |
| - IRQ_TYPE_LEVEL_LOW)>, |
| - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | |
| - IRQ_TYPE_LEVEL_LOW)>, |
| - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | |
| - IRQ_TYPE_LEVEL_LOW)>; |
| - }; |
| - |
| rst: reset-controller@e6160000 { |
| compatible = "renesas,r8a7792-rst"; |
| reg = <0 0xe6160000 0 0x0100>; |
| @@ -857,4 +845,12 @@ |
| #reset-cells = <1>; |
| }; |
| }; |
| + |
| + timer { |
| + compatible = "arm,armv7-timer"; |
| + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; |
| + }; |
| }; |
| -- |
| 2.19.0 |
| |