| From 928998dd694fc537c4ff85295e28c9893518f446 Mon Sep 17 00:00:00 2001 |
| From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
| Date: Fri, 11 May 2018 13:31:20 +0900 |
| Subject: [PATCH 1550/1795] arm64: dts: renesas: r8a77990: Add EthernetAVB |
| device nodes |
| |
| This patch adds EthernetAVB node for r8a77990 (R-Car E3). |
| |
| Based on a patch from Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| |
| Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 913a78b575c313b8bee8384a542e637049232e40) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm64/boot/dts/renesas/r8a77990.dtsi | 45 +++++++++++++++++++++++ |
| 1 file changed, 45 insertions(+) |
| |
| diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi |
| index bbc3db50bc01..be4f519711a1 100644 |
| --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi |
| @@ -191,6 +191,51 @@ |
| #power-domain-cells = <1>; |
| }; |
| |
| + avb: ethernet@e6800000 { |
| + compatible = "renesas,etheravb-r8a77990", |
| + "renesas,etheravb-rcar-gen3"; |
| + reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; |
| + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, |
| + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; |
| + interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| + "ch4", "ch5", "ch6", "ch7", |
| + "ch8", "ch9", "ch10", "ch11", |
| + "ch12", "ch13", "ch14", "ch15", |
| + "ch16", "ch17", "ch18", "ch19", |
| + "ch20", "ch21", "ch22", "ch23", |
| + "ch24"; |
| + clocks = <&cpg CPG_MOD 812>; |
| + power-domains = <&sysc 32>; |
| + resets = <&cpg 812>; |
| + phy-mode = "rgmii"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + status = "disabled"; |
| + }; |
| + |
| scif2: serial@e6e88000 { |
| compatible = "renesas,scif-r8a77990", |
| "renesas,rcar-gen3-scif", "renesas,scif"; |
| -- |
| 2.19.0 |
| |
