| From a334d931b59164743fe2ed0485b1fbfefb4ba722 Mon Sep 17 00:00:00 2001 |
| From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| Date: Wed, 17 Apr 2013 11:33:56 +0200 |
| Subject: ARM: shmobile: r8a7790: Add DU and LVDS clocks |
| |
| Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 9d8907c4e8c97127c562055ac7e1a8ea39ea589c) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/mach-shmobile/clock-r8a7790.c | 12 +++++++++++- |
| 1 file changed, 11 insertions(+), 1 deletion(-) |
| |
| diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c |
| index fc36d3db0b4d..d99b87bc76ea 100644 |
| --- a/arch/arm/mach-shmobile/clock-r8a7790.c |
| +++ b/arch/arm/mach-shmobile/clock-r8a7790.c |
| @@ -182,7 +182,7 @@ static struct clk div6_clks[DIV6_NR] = { |
| /* MSTP */ |
| enum { |
| MSTP813, |
| - MSTP721, MSTP720, |
| + MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, |
| MSTP717, MSTP716, |
| MSTP522, |
| MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, |
| @@ -193,6 +193,11 @@ enum { |
| |
| static struct clk mstp_clks[MSTP_NR] = { |
| [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ |
| + [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ |
| + [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */ |
| + [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ |
| + [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */ |
| + [MSTP722] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 22, 0), /* DU2 */ |
| [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ |
| [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ |
| [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ |
| @@ -251,6 +256,11 @@ static struct clk_lookup lookups[] = { |
| CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]), |
| |
| /* MSTP */ |
| + CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]), |
| + CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]), |
| + CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]), |
| + CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]), |
| + CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]), |
| CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), |
| CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), |
| CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), |
| -- |
| 1.8.5.rc3 |
| |
