| From 83cd0db346fa37b57fdd62d338257ad42b717488 Mon Sep 17 00:00:00 2001 |
| From: Magnus Damm <damm@opensource.se> |
| Date: Thu, 12 Sep 2013 09:32:49 +0900 |
| Subject: ARM: shmobile: Break out R-Car Gen2 setup code |
| |
| Move arch timer workaround code and boot mode pin |
| handling from setup-r8a7790.c to setup-rcar-gen2.c. |
| |
| With this in place the same code can be used on |
| other R-Car Generation 2 devices such as r8a7791. |
| |
| Signed-off-by: Magnus Damm <damm@opensource.se> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 629cc70ddac35520688b3a8bd165435c886e78eb) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| |
| Conflicts: |
| arch/arm/mach-shmobile/board-lager.c |
| --- |
| arch/arm/mach-shmobile/Makefile | 1 + |
| arch/arm/mach-shmobile/board-lager-reference.c | 2 +- |
| arch/arm/mach-shmobile/board-lager.c | 2 +- |
| arch/arm/mach-shmobile/clock-r8a7790.c | 2 +- |
| arch/arm/mach-shmobile/include/mach/r8a7790.h | 6 +- |
| arch/arm/mach-shmobile/include/mach/rcar-gen2.h | 8 +++ |
| arch/arm/mach-shmobile/setup-r8a7790.c | 68 +----------------- |
| arch/arm/mach-shmobile/setup-rcar-gen2.c | 91 +++++++++++++++++++++++++ |
| 8 files changed, 106 insertions(+), 74 deletions(-) |
| create mode 100644 arch/arm/mach-shmobile/include/mach/rcar-gen2.h |
| create mode 100644 arch/arm/mach-shmobile/setup-rcar-gen2.c |
| |
| diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile |
| index f8f699212984..d1486e550eae 100644 |
| --- a/arch/arm/mach-shmobile/Makefile |
| +++ b/arch/arm/mach-shmobile/Makefile |
| @@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o |
| obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o |
| obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o |
| obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o |
| +obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o setup-rcar-gen2.o |
| obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o |
| obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o |
| |
| diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c |
| index d39a91b3ba48..1a1a4a888632 100644 |
| --- a/arch/arm/mach-shmobile/board-lager-reference.c |
| +++ b/arch/arm/mach-shmobile/board-lager-reference.c |
| @@ -40,7 +40,7 @@ static const char *lager_boards_compat_dt[] __initdata = { |
| DT_MACHINE_START(LAGER_DT, "lager") |
| .smp = smp_ops(r8a7790_smp_ops), |
| .init_early = r8a7790_init_early, |
| + .init_time = rcar_gen2_timer_init, |
| .init_machine = lager_add_standard_devices, |
| - .init_time = r8a7790_timer_init, |
| .dt_compat = lager_boards_compat_dt, |
| MACHINE_END |
| diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c |
| index ba90fea55156..d83ed6556f7d 100644 |
| --- a/arch/arm/mach-shmobile/board-lager.c |
| +++ b/arch/arm/mach-shmobile/board-lager.c |
| @@ -256,7 +256,7 @@ static const char *lager_boards_compat_dt[] __initdata = { |
| DT_MACHINE_START(LAGER_DT, "lager") |
| .smp = smp_ops(r8a7790_smp_ops), |
| .init_early = r8a7790_init_early, |
| - .init_time = r8a7790_timer_init, |
| + .init_time = rcar_gen2_timer_init, |
| .init_machine = lager_init, |
| .dt_compat = lager_boards_compat_dt, |
| MACHINE_END |
| diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c |
| index 7661e898f376..a64f965c7da1 100644 |
| --- a/arch/arm/mach-shmobile/clock-r8a7790.c |
| +++ b/arch/arm/mach-shmobile/clock-r8a7790.c |
| @@ -310,7 +310,7 @@ static struct clk_lookup lookups[] = { |
| |
| void __init r8a7790_clock_init(void) |
| { |
| - u32 mode = r8a7790_read_mode_pins(); |
| + u32 mode = rcar_gen2_read_mode_pins(); |
| int k, ret = 0; |
| |
| switch (mode & (MD(14) | MD(13))) { |
| diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h |
| index 79e731c83e50..5fbfa28b40b6 100644 |
| --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h |
| +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h |
| @@ -1,15 +1,13 @@ |
| #ifndef __ASM_R8A7790_H__ |
| #define __ASM_R8A7790_H__ |
| |
| +#include <mach/rcar-gen2.h> |
| + |
| void r8a7790_add_standard_devices(void); |
| void r8a7790_add_dt_devices(void); |
| void r8a7790_clock_init(void); |
| void r8a7790_pinmux_init(void); |
| void r8a7790_init_early(void); |
| -void r8a7790_timer_init(void); |
| extern struct smp_operations r8a7790_smp_ops; |
| |
| -#define MD(nr) BIT(nr) |
| -u32 r8a7790_read_mode_pins(void); |
| - |
| #endif /* __ASM_R8A7790_H__ */ |
| diff --git a/arch/arm/mach-shmobile/include/mach/rcar-gen2.h b/arch/arm/mach-shmobile/include/mach/rcar-gen2.h |
| new file mode 100644 |
| index 000000000000..43f606eb2d82 |
| --- /dev/null |
| +++ b/arch/arm/mach-shmobile/include/mach/rcar-gen2.h |
| @@ -0,0 +1,8 @@ |
| +#ifndef __ASM_RCAR_GEN2_H__ |
| +#define __ASM_RCAR_GEN2_H__ |
| + |
| +void rcar_gen2_timer_init(void); |
| +#define MD(nr) BIT(nr) |
| +u32 rcar_gen2_read_mode_pins(void); |
| + |
| +#endif /* __ASM_RCAR_GEN2_H__ */ |
| diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c |
| index c7e24eff9ba2..c47bcebbcb00 100644 |
| --- a/arch/arm/mach-shmobile/setup-r8a7790.c |
| +++ b/arch/arm/mach-shmobile/setup-r8a7790.c |
| @@ -18,7 +18,6 @@ |
| * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| */ |
| |
| -#include <linux/clocksource.h> |
| #include <linux/irq.h> |
| #include <linux/kernel.h> |
| #include <linux/of_platform.h> |
| @@ -203,71 +202,6 @@ void __init r8a7790_add_standard_devices(void) |
| r8a7790_register_thermal(); |
| } |
| |
| -#define MODEMR 0xe6160060 |
| - |
| -u32 __init r8a7790_read_mode_pins(void) |
| -{ |
| - void __iomem *modemr = ioremap_nocache(MODEMR, 4); |
| - u32 mode; |
| - |
| - BUG_ON(!modemr); |
| - mode = ioread32(modemr); |
| - iounmap(modemr); |
| - |
| - return mode; |
| -} |
| - |
| -#define CNTCR 0 |
| -#define CNTFID0 0x20 |
| - |
| -void __init r8a7790_timer_init(void) |
| -{ |
| -#ifdef CONFIG_ARM_ARCH_TIMER |
| - u32 mode = r8a7790_read_mode_pins(); |
| - void __iomem *base; |
| - int extal_mhz = 0; |
| - u32 freq; |
| - |
| - /* At Linux boot time the r8a7790 arch timer comes up |
| - * with the counter disabled. Moreover, it may also report |
| - * a potentially incorrect fixed 13 MHz frequency. To be |
| - * correct these registers need to be updated to use the |
| - * frequency EXTAL / 2 which can be determined by the MD pins. |
| - */ |
| - |
| - switch (mode & (MD(14) | MD(13))) { |
| - case 0: |
| - extal_mhz = 15; |
| - break; |
| - case MD(13): |
| - extal_mhz = 20; |
| - break; |
| - case MD(14): |
| - extal_mhz = 26; |
| - break; |
| - case MD(13) | MD(14): |
| - extal_mhz = 30; |
| - break; |
| - } |
| - |
| - /* The arch timer frequency equals EXTAL / 2 */ |
| - freq = extal_mhz * (1000000 / 2); |
| - |
| - /* Remap "armgcnt address map" space */ |
| - base = ioremap(0xe6080000, PAGE_SIZE); |
| - |
| - /* Update registers with correct frequency */ |
| - iowrite32(freq, base + CNTFID0); |
| - asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); |
| - |
| - /* make sure arch timer is started by setting bit 0 of CNTCR */ |
| - iowrite32(1, base + CNTCR); |
| - iounmap(base); |
| -#endif /* CONFIG_ARM_ARCH_TIMER */ |
| - |
| - clocksource_of_init(); |
| -} |
| - |
| void __init r8a7790_init_early(void) |
| { |
| #ifndef CONFIG_ARM_ARCH_TIMER |
| @@ -285,7 +219,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = { |
| DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") |
| .smp = smp_ops(r8a7790_smp_ops), |
| .init_early = r8a7790_init_early, |
| - .init_time = r8a7790_timer_init, |
| + .init_time = rcar_gen2_timer_init, |
| .dt_compat = r8a7790_boards_compat_dt, |
| MACHINE_END |
| #endif /* CONFIG_USE_OF */ |
| diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c |
| new file mode 100644 |
| index 000000000000..5734c24bf6c7 |
| --- /dev/null |
| +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c |
| @@ -0,0 +1,91 @@ |
| +/* |
| + * R-Car Generation 2 support |
| + * |
| + * Copyright (C) 2013 Renesas Solutions Corp. |
| + * Copyright (C) 2013 Magnus Damm |
| + * |
| + * This program is free software; you can redistribute it and/or modify |
| + * it under the terms of the GNU General Public License as published by |
| + * the Free Software Foundation; version 2 of the License. |
| + * |
| + * This program is distributed in the hope that it will be useful, |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| + * GNU General Public License for more details. |
| + * |
| + * You should have received a copy of the GNU General Public License |
| + * along with this program; if not, write to the Free Software |
| + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| + */ |
| + |
| +#include <linux/clocksource.h> |
| +#include <linux/io.h> |
| +#include <linux/kernel.h> |
| +#include <mach/common.h> |
| +#include <mach/rcar-gen2.h> |
| +#include <asm/mach/arch.h> |
| + |
| +#define MODEMR 0xe6160060 |
| + |
| +u32 __init rcar_gen2_read_mode_pins(void) |
| +{ |
| + void __iomem *modemr = ioremap_nocache(MODEMR, 4); |
| + u32 mode; |
| + |
| + BUG_ON(!modemr); |
| + mode = ioread32(modemr); |
| + iounmap(modemr); |
| + |
| + return mode; |
| +} |
| + |
| +#define CNTCR 0 |
| +#define CNTFID0 0x20 |
| + |
| +void __init rcar_gen2_timer_init(void) |
| +{ |
| +#ifdef CONFIG_ARM_ARCH_TIMER |
| + u32 mode = rcar_gen2_read_mode_pins(); |
| + void __iomem *base; |
| + int extal_mhz = 0; |
| + u32 freq; |
| + |
| + /* At Linux boot time the r8a7790 arch timer comes up |
| + * with the counter disabled. Moreover, it may also report |
| + * a potentially incorrect fixed 13 MHz frequency. To be |
| + * correct these registers need to be updated to use the |
| + * frequency EXTAL / 2 which can be determined by the MD pins. |
| + */ |
| + |
| + switch (mode & (MD(14) | MD(13))) { |
| + case 0: |
| + extal_mhz = 15; |
| + break; |
| + case MD(13): |
| + extal_mhz = 20; |
| + break; |
| + case MD(14): |
| + extal_mhz = 26; |
| + break; |
| + case MD(13) | MD(14): |
| + extal_mhz = 30; |
| + break; |
| + } |
| + |
| + /* The arch timer frequency equals EXTAL / 2 */ |
| + freq = extal_mhz * (1000000 / 2); |
| + |
| + /* Remap "armgcnt address map" space */ |
| + base = ioremap(0xe6080000, PAGE_SIZE); |
| + |
| + /* Update registers with correct frequency */ |
| + iowrite32(freq, base + CNTFID0); |
| + asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); |
| + |
| + /* make sure arch timer is started by setting bit 0 of CNTCR */ |
| + iowrite32(1, base + CNTCR); |
| + iounmap(base); |
| +#endif /* CONFIG_ARM_ARCH_TIMER */ |
| + |
| + clocksource_of_init(); |
| +} |
| -- |
| 1.8.5.rc3 |
| |