blob: 59c3dd303110e1eecc5c638cfa5c0eac857dfed2 [file] [log] [blame]
From f804c862abb7b1cabc5f930c71dc3ab187732095 Mon Sep 17 00:00:00 2001
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Date: Tue, 16 Apr 2013 22:17:42 -0700
Subject: ARM: shmobile: bockw: define FPGA address and rename iomem variable
Bock-W board will needs more board specific ioremap() method.
This patch tidyup current FPGA specific settings
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 44bfe6847a088c6207a4a21974e5cfe8517d3e4f)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/board-bockw.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index dac4365c..badde08d 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -46,10 +46,11 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
"scif0_ctrl", "scif0"),
};
+#define FPGA 0x18200000
#define IRQ0MR 0x30
static void __init bockw_init(void)
{
- void __iomem *fpga;
+ void __iomem *base;
r8a7778_clock_init();
r8a7778_init_irq_extpin(1);
@@ -59,8 +60,8 @@ static void __init bockw_init(void)
ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init();
- fpga = ioremap_nocache(0x18200000, SZ_1M);
- if (fpga) {
+ base = ioremap_nocache(FPGA, SZ_1M);
+ if (base) {
/*
* CAUTION
*
@@ -68,10 +69,10 @@ static void __init bockw_init(void)
* it should be cared in the future
* Now, it is assuming IRQ0 was used only from SMSC.
*/
- u16 val = ioread16(fpga + IRQ0MR);
+ u16 val = ioread16(base + IRQ0MR);
val &= ~(1 << 4); /* enable SMSC911x */
- iowrite16(val, fpga + IRQ0MR);
- iounmap(fpga);
+ iowrite16(val, base + IRQ0MR);
+ iounmap(base);
platform_device_register_resndata(
&platform_bus, "smsc911x", -1,
--
1.8.4.3.gca3854a