| From f032dfbd2e473d960f47f03862c4c9545d2749bc Mon Sep 17 00:00:00 2001 |
| From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| Date: Wed, 11 Dec 2013 15:05:15 +0100 |
| Subject: ARM: shmobile: r8a7790: Reference clocks |
| |
| Reference clocks using a "clocks" property in all nodes corresponding to |
| devices that require a clock. |
| |
| Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 72197ca7a1cb1cea5615c879f638d5d457c0b2e2) |
| (Queued by Simon Horman for v3.14 but not yet in Linus's tree) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r8a7790.dtsi | 10 ++++++++++ |
| 1 file changed, 10 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi |
| index c549bf56bf84..28e946081797 100644 |
| --- a/arch/arm/boot/dts/r8a7790.dtsi |
| +++ b/arch/arm/boot/dts/r8a7790.dtsi |
| @@ -197,6 +197,7 @@ |
| reg = <0 0xe6508000 0 0x40>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_I2C0>; |
| status = "disabled"; |
| }; |
| |
| @@ -207,6 +208,7 @@ |
| reg = <0 0xe6518000 0 0x40>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_I2C1>; |
| status = "disabled"; |
| }; |
| |
| @@ -217,6 +219,7 @@ |
| reg = <0 0xe6530000 0 0x40>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_I2C2>; |
| status = "disabled"; |
| }; |
| |
| @@ -227,6 +230,7 @@ |
| reg = <0 0xe6540000 0 0x40>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_I2C3>; |
| status = "disabled"; |
| }; |
| |
| @@ -235,6 +239,7 @@ |
| reg = <0 0xee200000 0 0x80>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>; |
| reg-io-width = <4>; |
| status = "disabled"; |
| }; |
| @@ -244,6 +249,7 @@ |
| reg = <0 0xee220000 0 0x80>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; |
| reg-io-width = <4>; |
| status = "disabled"; |
| }; |
| @@ -258,6 +264,7 @@ |
| reg = <0 0xee100000 0 0x200>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; |
| cap-sd-highspeed; |
| status = "disabled"; |
| }; |
| @@ -267,6 +274,7 @@ |
| reg = <0 0xee120000 0 0x200>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; |
| cap-sd-highspeed; |
| status = "disabled"; |
| }; |
| @@ -276,6 +284,7 @@ |
| reg = <0 0xee140000 0 0x100>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; |
| cap-sd-highspeed; |
| status = "disabled"; |
| }; |
| @@ -285,6 +294,7 @@ |
| reg = <0 0xee160000 0 0x100>; |
| interrupt-parent = <&gic>; |
| interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; |
| cap-sd-highspeed; |
| status = "disabled"; |
| }; |
| -- |
| 1.8.5.rc3 |
| |