| From f00ed050f314379e4820624a126aeeb51053729c Mon Sep 17 00:00:00 2001 |
| From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
| Date: Mon, 3 Jun 2013 22:10:24 -0700 |
| Subject: ARM: shmobile: r8a7778: add support I2C clock |
| |
| This patch adds r8a7778 I2C clock support. |
| It also adds peripheral_clk which is requiested |
| from i2c-rcar driver |
| |
| Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> |
| Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit b6bb9a6426cab90216763374b9d2ebc4abc48016) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| |
| Conflicts: |
| arch/arm/mach-shmobile/clock-r8a7778.c |
| --- |
| arch/arm/mach-shmobile/clock-r8a7778.c | 14 +++++++++++++- |
| 1 file changed, 13 insertions(+), 1 deletion(-) |
| |
| diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c |
| index 696d206a..da39198e 100644 |
| --- a/arch/arm/mach-shmobile/clock-r8a7778.c |
| +++ b/arch/arm/mach-shmobile/clock-r8a7778.c |
| @@ -106,7 +106,8 @@ enum { |
| MSTP323, MSTP322, MSTP321, |
| MSTP114, |
| MSTP100, |
| - MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, |
| + MSTP030, |
| + MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, |
| MSTP016, MSTP015, |
| MSTP_NR }; |
| |
| @@ -116,6 +117,10 @@ static struct clk mstp_clks[MSTP_NR] = { |
| [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */ |
| [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */ |
| [MSTP100] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 0, 0), /* USB0/1 */ |
| + [MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */ |
| + [MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */ |
| + [MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */ |
| + [MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */ |
| [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */ |
| [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */ |
| [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */ |
| @@ -127,6 +132,9 @@ static struct clk mstp_clks[MSTP_NR] = { |
| }; |
| |
| static struct clk_lookup lookups[] = { |
| + /* main */ |
| + CLKDEV_CON_ID("peripheral_clk", &p_clk), |
| + |
| /* MSTP32 clocks */ |
| CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ |
| CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ |
| @@ -134,6 +142,10 @@ static struct clk_lookup lookups[] = { |
| CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ |
| CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ |
| CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ |
| + CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ |
| + CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ |
| + CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */ |
| + CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */ |
| CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ |
| CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ |
| CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ |
| -- |
| 1.8.4.3.gca3854a |
| |