| From 5c8722c5f7bceb1577c42b03cdd04bb441f55ecd Mon Sep 17 00:00:00 2001 |
| From: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> |
| Date: Tue, 10 Sep 2013 18:59:49 +0100 |
| Subject: ARM: shmobile: change dev_id to cpu0 while registering cpu clock |
| |
| Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id |
| for cpu clock which refers to virtual platform device. It needs to |
| be "cpu0" instead which is actual cpu0 device id. |
| |
| This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0". |
| |
| Reported-and-tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
| Cc: Shawn Guo <shawn.guo@linaro.org> |
| Cc: Magnus Damm <damm@opensource.se> |
| Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> |
| Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
| (cherry picked from commit e4a6a29d1250022a885123cc0a04bd176b508854) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/mach-shmobile/clock-r8a73a4.c | 2 +- |
| arch/arm/mach-shmobile/clock-sh73a0.c | 2 +- |
| 2 files changed, 2 insertions(+), 2 deletions(-) |
| |
| diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c |
| index 8ea5ef6c..5bd2e851 100644 |
| --- a/arch/arm/mach-shmobile/clock-r8a73a4.c |
| +++ b/arch/arm/mach-shmobile/clock-r8a73a4.c |
| @@ -555,7 +555,7 @@ static struct clk_lookup lookups[] = { |
| CLKDEV_CON_ID("pll2h", &pll2h_clk), |
| |
| /* CPU clock */ |
| - CLKDEV_DEV_ID("cpufreq-cpu0", &z_clk), |
| + CLKDEV_DEV_ID("cpu0", &z_clk), |
| |
| /* DIV6 */ |
| CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), |
| diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c |
| index 1942eaef..c92c023f 100644 |
| --- a/arch/arm/mach-shmobile/clock-sh73a0.c |
| +++ b/arch/arm/mach-shmobile/clock-sh73a0.c |
| @@ -616,7 +616,7 @@ static struct clk_lookup lookups[] = { |
| CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */ |
| |
| /* DIV4 clocks */ |
| - CLKDEV_DEV_ID("cpufreq-cpu0", &div4_clks[DIV4_Z]), |
| + CLKDEV_DEV_ID("cpu0", &div4_clks[DIV4_Z]), |
| |
| /* DIV6 clocks */ |
| CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), |
| -- |
| 1.8.4.3.gca3854a |
| |
