blob: 05c1d6cdce385ffa82caa0ad1028f0f27b2e4729 [file] [log] [blame]
From 9206105698487d79571b34225455363f8eaaf371 Mon Sep 17 00:00:00 2001
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Date: Thu, 6 Jun 2013 09:43:16 +0000
Subject: sh_eth: remove #ifdef around EDSR and GECMR bit definitions
Remove #ifdef around 'enum EDSR_BIT' and 'enum GECMR_BIT', replacing it with the
comments on which SoCs these registers exist.
SH7757 also has EDSR, so add a comment about it to 'enum EDSR_BIT'.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
[Sergei: folded in the former patch #2, updated the changelog, reworded the
subject, changing the prefix.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 41d5ffeb9d12f760722f00ba0756389d32435124)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/net/ethernet/renesas/sh_eth.h | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 62689a58..034bee94 100644
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -166,19 +166,16 @@ enum {
/*
* Register's bits
*/
-#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\
- defined(CONFIG_ARCH_R8A7740)
-/* EDSR */
+/* EDSR : sh7734, sh7757, sh7763, and r8a7740 only */
enum EDSR_BIT {
EDSR_ENT = 0x01, EDSR_ENR = 0x02,
};
#define EDSR_ENALL (EDSR_ENT|EDSR_ENR)
-/* GECMR */
+/* GECMR : sh7734, sh7763 and r8a7740 only */
enum GECMR_BIT {
GECMR_10 = 0x0, GECMR_100 = 0x04, GECMR_1000 = 0x01,
};
-#endif
/* EDMR */
enum DMAC_M_BIT {
--
1.8.4.3.gca3854a