| From 596589d192a4b6ba6c1b03a7454094df1040d802 Mon Sep 17 00:00:00 2001 |
| From: Wolfram Sang <wsa@sang-engineering.com> |
| Date: Mon, 24 Feb 2014 20:57:11 +0100 |
| Subject: clk: shmobile: div6: use proper description in kernel doc |
| |
| These variable clocks have nothing to do with MSTP gating, probably a |
| copy&paste leftover. |
| |
| Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> |
| Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| Signed-off-by: Mike Turquette <mturquette@linaro.org> |
| (cherry picked from commit 95aa4f9b5fe577de902aa780e91140c6e89c73a2) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/clk/shmobile/clk-div6.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c |
| index aac4756ec52e..f065f694cb65 100644 |
| --- a/drivers/clk/shmobile/clk-div6.c |
| +++ b/drivers/clk/shmobile/clk-div6.c |
| @@ -23,7 +23,7 @@ |
| #define CPG_DIV6_DIV_MASK 0x3f |
| |
| /** |
| - * struct div6_clock - MSTP gating clock |
| + * struct div6_clock - CPG 6 bit divider clock |
| * @hw: handle between common and hardware-specific interfaces |
| * @reg: IO-remapped register |
| * @div: divisor value (1-64) |
| -- |
| 2.1.2 |
| |
