blob: 66d5706e9d38dd0bdbbfbe164e84d05ea147b8ac [file] [log] [blame]
From d5ad76c95319d1951c1dca5ff88e0bcf7a1e62c3 Mon Sep 17 00:00:00 2001
From: Biju Das <biju.das@bp.renesas.com>
Date: Wed, 30 Aug 2017 14:41:12 +0100
Subject: [PATCH 0331/1795] ARM: dts: iwg20d-q7: Enable internal PCI
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 35a8eeeac89c56435277fa76f8d557bf00530320)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
index 2b58b53aa171..63166f9bdb65 100644
--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
@@ -76,6 +76,16 @@
function = "sdhi1";
power-source = <1800>;
};
+
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
+ };
+
+ usb1_pins: usb1 {
+ groups = "usb1";
+ function = "usb1";
+ };
};
&scif0 {
@@ -125,3 +135,15 @@
reg = <0x68>;
};
};
+
+&pci0 {
+ status = "okay";
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+};
+
+&pci1 {
+ status = "okay";
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+};
--
2.19.0