| From 29df2e318c3b92ca7966b584525c23a2bda5cddb Mon Sep 17 00:00:00 2001 |
| From: Dinh Nguyen <dinguyen@kernel.org> |
| Date: Wed, 13 Dec 2017 08:10:31 -0600 |
| Subject: [PATCH 1644/1795] arm64: dts: stratix10: add USB ECC reset bit |
| |
| The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted |
| as well for the USB IP to work properly. |
| |
| Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
| (cherry picked from commit 33af8ca0fd09514aa6a5600ae2aa455a30de5f43) |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++---- |
| 1 file changed, 4 insertions(+), 4 deletions(-) |
| |
| diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi |
| index 9db19314c60c..16d47b9f17fe 100644 |
| --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi |
| +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi |
| @@ -336,8 +336,8 @@ |
| interrupts = <0 93 4>; |
| phys = <&usbphy0>; |
| phy-names = "usb2-phy"; |
| - resets = <&rst USB0_RESET>; |
| - reset-names = "dwc2"; |
| + resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; |
| + reset-names = "dwc2", "dwc2-ecc"; |
| status = "disabled"; |
| }; |
| |
| @@ -347,8 +347,8 @@ |
| interrupts = <0 94 4>; |
| phys = <&usbphy0>; |
| phy-names = "usb2-phy"; |
| - resets = <&rst USB1_RESET>; |
| - reset-names = "dwc2"; |
| + resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; |
| + reset-names = "dwc2", "dwc2-ecc"; |
| status = "disabled"; |
| }; |
| |
| -- |
| 2.19.0 |
| |
