aarch64: Remove TSCXT bit set from SCTLR_EL2_RESET
From the specification SCTLR_EL2.TSCXT is RES1 only "When
FEAT_CSV2_2 is not implemented, FEAT_CSV2_1p2 is not
implemented, HCR_EL2.E2H == 1 and HCR_EL2.TGE == 1", so
given that HCR_EL2.E2H is set by bootwrapper before to a
value of zero, the condition above can't happen and from
the specification the bit is RES0.
Fix the macro removing the bit.
Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
1 file changed
