| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ |
| /* Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved. */ |
| |
| #ifndef DT_BINDINGS_POWER_NVIDIA_TEGRA264_BPMP_H |
| #define DT_BINDINGS_POWER_NVIDIA_TEGRA264_BPMP_H |
| |
| #define TEGRA264_POWER_DOMAIN_DISP 1 |
| #define TEGRA264_POWER_DOMAIN_AUD 2 |
| /* reserved 3:9 */ |
| #define TEGRA264_POWER_DOMAIN_XUSB_SS 10 |
| #define TEGRA264_POWER_DOMAIN_XUSB_DEV 11 |
| #define TEGRA264_POWER_DOMAIN_XUSB_HOST 12 |
| #define TEGRA264_POWER_DOMAIN_MGBE0 13 |
| #define TEGRA264_POWER_DOMAIN_MGBE1 14 |
| #define TEGRA264_POWER_DOMAIN_MGBE2 15 |
| #define TEGRA264_POWER_DOMAIN_MGBE3 16 |
| #define TEGRA264_POWER_DOMAIN_VI 17 |
| #define TEGRA264_POWER_DOMAIN_VIC 18 |
| #define TEGRA264_POWER_DOMAIN_ISP0 19 |
| #define TEGRA264_POWER_DOMAIN_ISP1 20 |
| #define TEGRA264_POWER_DOMAIN_PVA0 21 |
| #define TEGRA264_POWER_DOMAIN_GPU 22 |
| |
| #endif /* DT_BINDINGS_POWER_NVIDIA_TEGRA264_BPMP_H */ |
