| Subject: powerpc-preempt-lazy-support.patch |
| From: Thomas Gleixner <tglx@linutronix.de> |
| Date: Thu, 01 Nov 2012 10:14:11 +0100 |
| |
| Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
| --- |
| arch/powerpc/Kconfig | 1 + |
| arch/powerpc/include/asm/thread_info.h | 10 ++++++++-- |
| arch/powerpc/kernel/asm-offsets.c | 1 + |
| arch/powerpc/kernel/entry_32.S | 17 ++++++++++++----- |
| arch/powerpc/kernel/entry_64.S | 12 +++++++++--- |
| 5 files changed, 31 insertions(+), 10 deletions(-) |
| |
| --- a/arch/powerpc/Kconfig |
| +++ b/arch/powerpc/Kconfig |
| @@ -142,6 +142,7 @@ config PPC |
| select GENERIC_CLOCKEVENTS |
| select GENERIC_STRNCPY_FROM_USER |
| select GENERIC_STRNLEN_USER |
| + select HAVE_PREEMPT_LAZY |
| select HAVE_MOD_ARCH_SPECIFIC |
| select MODULES_USE_ELF_RELA |
| select CLONE_BACKWARDS |
| --- a/arch/powerpc/include/asm/thread_info.h |
| +++ b/arch/powerpc/include/asm/thread_info.h |
| @@ -43,6 +43,8 @@ struct thread_info { |
| int cpu; /* cpu we're on */ |
| int preempt_count; /* 0 => preemptable, |
| <0 => BUG */ |
| + int preempt_lazy_count; /* 0 => preemptable, |
| + <0 => BUG */ |
| struct restart_block restart_block; |
| unsigned long local_flags; /* private flags for thread */ |
| |
| @@ -97,7 +99,7 @@ static inline struct thread_info *curren |
| #define TIF_PERFMON_CTXSW 6 /* perfmon needs ctxsw calls */ |
| #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ |
| #define TIF_SINGLESTEP 8 /* singlestepping active */ |
| -#define TIF_MEMDIE 9 /* is terminating due to OOM killer */ |
| +#define TIF_NEED_RESCHED_LAZY 9 /* lazy rescheduling necessary */ |
| #define TIF_SECCOMP 10 /* secure computing */ |
| #define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ |
| #define TIF_NOERROR 12 /* Force successful syscall return */ |
| @@ -106,6 +108,7 @@ static inline struct thread_info *curren |
| #define TIF_SYSCALL_TRACEPOINT 15 /* syscall tracepoint instrumentation */ |
| #define TIF_EMULATE_STACK_STORE 16 /* Is an instruction emulation |
| for stack store? */ |
| +#define TIF_MEMDIE 17 /* is terminating due to OOM killer */ |
| |
| /* as above, but as bit values */ |
| #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
| @@ -124,12 +127,15 @@ static inline struct thread_info *curren |
| #define _TIF_UPROBE (1<<TIF_UPROBE) |
| #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) |
| #define _TIF_EMULATE_STACK_STORE (1<<TIF_EMULATE_STACK_STORE) |
| +#define _TIF_NEED_RESCHED_LAZY (1<<TIF_NEED_RESCHED_LAZY) |
| #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ |
| _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT) |
| |
| #define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ |
| - _TIF_NOTIFY_RESUME | _TIF_UPROBE) |
| + _TIF_NOTIFY_RESUME | _TIF_UPROBE | \ |
| + _TIF_NEED_RESCHED_LAZY) |
| #define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR) |
| +#define _TIF_NEED_RESCHED_MASK (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY) |
| |
| /* Bits in local_flags */ |
| /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */ |
| --- a/arch/powerpc/kernel/asm-offsets.c |
| +++ b/arch/powerpc/kernel/asm-offsets.c |
| @@ -124,6 +124,7 @@ int main(void) |
| DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); |
| DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags)); |
| DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); |
| + DEFINE(TI_PREEMPT_LAZY, offsetof(struct thread_info, preempt_lazy_count)); |
| DEFINE(TI_TASK, offsetof(struct thread_info, task)); |
| DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); |
| |
| --- a/arch/powerpc/kernel/entry_32.S |
| +++ b/arch/powerpc/kernel/entry_32.S |
| @@ -892,7 +892,14 @@ resume_kernel: |
| cmpwi 0,r0,0 /* if non-zero, just restore regs and return */ |
| bne restore |
| andi. r8,r8,_TIF_NEED_RESCHED |
| + bne+ 1f |
| + lwz r0,TI_PREEMPT_LAZY(r9) |
| + cmpwi 0,r0,0 /* if non-zero, just restore regs and return */ |
| + bne restore |
| + lwz r0,TI_FLAGS(r9) |
| + andi. r0,r0,_TIF_NEED_RESCHED_LAZY |
| beq+ restore |
| +1: |
| lwz r3,_MSR(r1) |
| andi. r0,r3,MSR_EE /* interrupts off? */ |
| beq restore /* don't schedule if so */ |
| @@ -903,11 +910,11 @@ resume_kernel: |
| */ |
| bl trace_hardirqs_off |
| #endif |
| -1: bl preempt_schedule_irq |
| +2: bl preempt_schedule_irq |
| CURRENT_THREAD_INFO(r9, r1) |
| lwz r3,TI_FLAGS(r9) |
| - andi. r0,r3,_TIF_NEED_RESCHED |
| - bne- 1b |
| + andi. r0,r3,_TIF_NEED_RESCHED_MASK |
| + bne- 2b |
| #ifdef CONFIG_TRACE_IRQFLAGS |
| /* And now, to properly rebalance the above, we tell lockdep they |
| * are being turned back on, which will happen when we return |
| @@ -1228,7 +1235,7 @@ global_dbcr0: |
| #endif /* !(CONFIG_4xx || CONFIG_BOOKE) */ |
| |
| do_work: /* r10 contains MSR_KERNEL here */ |
| - andi. r0,r9,_TIF_NEED_RESCHED |
| + andi. r0,r9,_TIF_NEED_RESCHED_MASK |
| beq do_user_signal |
| |
| do_resched: /* r10 contains MSR_KERNEL here */ |
| @@ -1249,7 +1256,7 @@ recheck: |
| MTMSRD(r10) /* disable interrupts */ |
| CURRENT_THREAD_INFO(r9, r1) |
| lwz r9,TI_FLAGS(r9) |
| - andi. r0,r9,_TIF_NEED_RESCHED |
| + andi. r0,r9,_TIF_NEED_RESCHED_MASK |
| bne- do_resched |
| andi. r0,r9,_TIF_USER_WORK_MASK |
| beq restore_user |
| --- a/arch/powerpc/kernel/entry_64.S |
| +++ b/arch/powerpc/kernel/entry_64.S |
| @@ -592,7 +592,7 @@ _GLOBAL(ret_from_except_lite) |
| andi. r0,r4,_TIF_USER_WORK_MASK |
| beq restore |
| |
| - andi. r0,r4,_TIF_NEED_RESCHED |
| + andi. r0,r4,_TIF_NEED_RESCHED_MASK |
| beq 1f |
| bl .restore_interrupts |
| bl .schedule |
| @@ -642,10 +642,16 @@ resume_kernel: |
| |
| #ifdef CONFIG_PREEMPT |
| /* Check if we need to preempt */ |
| + lwz r8,TI_PREEMPT(r9) |
| andi. r0,r4,_TIF_NEED_RESCHED |
| + bne+ check_count |
| + |
| + andi. r0,r4,_TIF_NEED_RESCHED_LAZY |
| beq+ restore |
| + lwz r8,TI_PREEMPT_LAZY(r9) |
| + |
| /* Check that preempt_count() == 0 and interrupts are enabled */ |
| - lwz r8,TI_PREEMPT(r9) |
| +check_count: |
| cmpwi cr1,r8,0 |
| ld r0,SOFTE(r1) |
| cmpdi r0,0 |
| @@ -662,7 +668,7 @@ resume_kernel: |
| /* Re-test flags and eventually loop */ |
| CURRENT_THREAD_INFO(r9, r1) |
| ld r4,TI_FLAGS(r9) |
| - andi. r0,r4,_TIF_NEED_RESCHED |
| + andi. r0,r4,_TIF_NEED_RESCHED_MASK |
| bne 1b |
| |
| /* |