| From 242a3e21d747c6a1c7aef0462608fd0ab810fd67 Mon Sep 17 00:00:00 2001 |
| From: Jernej Skrabec <jernej.skrabec@siol.net> |
| Date: Sat, 25 Jan 2020 00:20:10 +0100 |
| Subject: [PATCH] arm64: dts: allwinner: a64: Fix display clock register range |
| |
| commit 3e9a1a8b7f811de3eb1445d72f68766b704ad17c upstream. |
| |
| Register range of display clocks is 0x10000, as it can be seen from |
| DE2 documentation. |
| |
| Fix it. |
| |
| Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> |
| Fixes: 2c796fc8f5dbd ("arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU") |
| [wens@csie.org: added fixes tag] |
| Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |
| index d5e5be103c1c..82871a763afd 100644 |
| --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |
| +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |
| @@ -227,7 +227,7 @@ |
| |
| display_clocks: clock@0 { |
| compatible = "allwinner,sun50i-a64-de2-clk"; |
| - reg = <0x0 0x100000>; |
| + reg = <0x0 0x10000>; |
| clocks = <&ccu CLK_BUS_DE>, |
| <&ccu CLK_DE>; |
| clock-names = "bus", |
| -- |
| 2.7.4 |
| |
