| From 026b37821fd6eae865f0f0ca388c6df55924fda0 Mon Sep 17 00:00:00 2001 |
| From: Sam Bobroff <sbobroff@linux.ibm.com> |
| Date: Mon, 18 Nov 2019 10:53:53 +1100 |
| Subject: [PATCH] drm/radeon: fix bad DMA from INTERRUPT_CNTL2 |
| |
| commit 62d91dd2851e8ae2ca552f1b090a3575a4edf759 upstream. |
| |
| The INTERRUPT_CNTL2 register expects a valid DMA address, but is |
| currently set with a GPU MC address. This can cause problems on |
| systems that detect the resulting DMA read from an invalid address |
| (found on a Power8 guest). |
| |
| Instead, use the DMA address of the dummy page because it will always |
| be safe. |
| |
| Fixes: d8f60cfc9345 ("drm/radeon/kms: Add support for interrupts on r6xx/r7xx chips (v3)") |
| Fixes: 25a857fbe973 ("drm/radeon/kms: add support for interrupts on SI") |
| Fixes: a59781bbe528 ("drm/radeon: add support for interrupts on CIK (v5)") |
| Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c |
| index ab7b4e2ffcd2..947b97a390ae 100644 |
| --- a/drivers/gpu/drm/radeon/cik.c |
| +++ b/drivers/gpu/drm/radeon/cik.c |
| @@ -6965,8 +6965,8 @@ static int cik_irq_init(struct radeon_device *rdev) |
| } |
| |
| /* setup interrupt control */ |
| - /* XXX this should actually be a bus address, not an MC address. same on older asics */ |
| - WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); |
| + /* set dummy read address to dummy page address */ |
| + WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); |
| interrupt_cntl = RREG32(INTERRUPT_CNTL); |
| /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi |
| * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN |
| diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c |
| index e06e2d8feab3..a724bb87cfad 100644 |
| --- a/drivers/gpu/drm/radeon/r600.c |
| +++ b/drivers/gpu/drm/radeon/r600.c |
| @@ -3690,8 +3690,8 @@ int r600_irq_init(struct radeon_device *rdev) |
| } |
| |
| /* setup interrupt control */ |
| - /* set dummy read address to ring address */ |
| - WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); |
| + /* set dummy read address to dummy page address */ |
| + WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); |
| interrupt_cntl = RREG32(INTERRUPT_CNTL); |
| /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi |
| * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN |
| diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c |
| index 841bc8bc333d..c181ac082c23 100644 |
| --- a/drivers/gpu/drm/radeon/si.c |
| +++ b/drivers/gpu/drm/radeon/si.c |
| @@ -5993,8 +5993,8 @@ static int si_irq_init(struct radeon_device *rdev) |
| } |
| |
| /* setup interrupt control */ |
| - /* set dummy read address to ring address */ |
| - WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); |
| + /* set dummy read address to dummy page address */ |
| + WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); |
| interrupt_cntl = RREG32(INTERRUPT_CNTL); |
| /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi |
| * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN |
| -- |
| 2.7.4 |
| |
