| From 52ade8bc3260f2c1760fe0cba7fda06b1fac3cd3 Mon Sep 17 00:00:00 2001 |
| From: Tomi Valkeinen <tomi.valkeinen@ti.com> |
| Date: Wed, 2 Oct 2019 15:25:42 +0300 |
| Subject: [PATCH] drm/omap: fix max fclk divider for omap36xx |
| |
| commit e2c4ed148cf3ec8669a1d90dc66966028e5fad70 upstream. |
| |
| The OMAP36xx and AM/DM37x TRMs say that the maximum divider for DSS fclk |
| (in CM_CLKSEL_DSS) is 32. Experimentation shows that this is not |
| correct, and using divider of 32 breaks DSS with a flood or underflows |
| and sync losts. Dividers up to 31 seem to work fine. |
| |
| There is another patch to the DT files to limit the divider correctly, |
| but as the DSS driver also needs to know the maximum divider to be able |
| to iteratively find good rates, we also need to do the fix in the DSS |
| driver. |
| |
| Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> |
| Cc: Adam Ford <aford173@gmail.com> |
| Cc: stable@vger.kernel.org |
| Link: https://patchwork.freedesktop.org/patch/msgid/20191002122542.8449-1-tomi.valkeinen@ti.com |
| Tested-by: Adam Ford <aford173@gmail.com> |
| Reviewed-by: Jyri Sarha <jsarha@ti.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c |
| index 5711b7a720e6..25b6a79dc385 100644 |
| --- a/drivers/gpu/drm/omapdrm/dss/dss.c |
| +++ b/drivers/gpu/drm/omapdrm/dss/dss.c |
| @@ -1090,7 +1090,7 @@ static const struct dss_features omap34xx_dss_feats = { |
| |
| static const struct dss_features omap3630_dss_feats = { |
| .model = DSS_MODEL_OMAP3, |
| - .fck_div_max = 32, |
| + .fck_div_max = 31, |
| .fck_freq_max = 173000000, |
| .dss_fck_multiplier = 1, |
| .parent_clk_name = "dpll4_ck", |
| -- |
| 2.7.4 |
| |
