| From 8d944d9760a733df90ab3b2f444509572918a044 Mon Sep 17 00:00:00 2001 |
| From: Peng Fan <peng.fan@nxp.com> |
| Date: Wed, 18 Dec 2019 12:22:32 +0000 |
| Subject: [PATCH] ARM: dts: imx7ulp: fix reg of cpu node |
| |
| commit b8ab62ff7199fac8ce27fa4a149929034fabe7f8 upstream. |
| |
| According to arm cpus binding doc, |
| " |
| On 32-bit ARM v7 or later systems this property is |
| required and matches the CPU MPIDR[23:0] register |
| bits. |
| |
| Bits [23:0] in the reg cell must be set to |
| bits [23:0] in MPIDR. |
| |
| All other bits in the reg cell must be set to 0. |
| " |
| |
| In i.MX7ULP, the MPIDR[23:0] is 0xf00, not 0, so fix it. |
| Otherwise there will be warning: |
| "DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map" |
| |
| Fixes: 20434dc92c05 ("ARM: dts: imx: add common imx7ulp dtsi support") |
| Signed-off-by: Peng Fan <peng.fan@nxp.com> |
| Reviewed-by: Fabio Estevam <festevam@gmail.com> |
| Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi |
| index d6b711011cba..efb05cc48521 100644 |
| --- a/arch/arm/boot/dts/imx7ulp.dtsi |
| +++ b/arch/arm/boot/dts/imx7ulp.dtsi |
| @@ -36,10 +36,10 @@ |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| - cpu0: cpu@0 { |
| + cpu0: cpu@f00 { |
| compatible = "arm,cortex-a7"; |
| device_type = "cpu"; |
| - reg = <0>; |
| + reg = <0xf00>; |
| }; |
| }; |
| |
| -- |
| 2.7.4 |
| |
