| From 3a0f98e8eb8dba3c1f56b3d4cea5bb079671811e Mon Sep 17 00:00:00 2001 |
| From: Dinh Nguyen <dinguyen@kernel.org> |
| Date: Wed, 20 Nov 2019 09:15:17 -0600 |
| Subject: [PATCH] arm64: dts: agilex/stratix10: fix pmu interrupt numbers |
| |
| commit 210de0e996aee8e360ccc9e173fe7f0a7ed2f695 upstream. |
| |
| Fix up the correct interrupt numbers for the PMU unit on Agilex |
| and Stratix10. |
| |
| Fixes: 78cd6a9d8e15 ("arm64: dts: Add base stratix 10 dtsi") |
| Cc: linux-stable <stable@vger.kernel.org> |
| Reported-by: Meng Li <Meng.Li@windriver.com> |
| Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi |
| index 470dcfd9de91..3df00f987e25 100644 |
| --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi |
| +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi |
| @@ -61,10 +61,10 @@ |
| |
| pmu { |
| compatible = "arm,armv8-pmuv3"; |
| - interrupts = <0 120 8>, |
| - <0 121 8>, |
| - <0 122 8>, |
| - <0 123 8>; |
| + interrupts = <0 170 4>, |
| + <0 171 4>, |
| + <0 172 4>, |
| + <0 173 4>; |
| interrupt-affinity = <&cpu0>, |
| <&cpu1>, |
| <&cpu2>, |
| diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi |
| index e4ceb3a73c81..4af2cd36f8ee 100644 |
| --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi |
| +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi |
| @@ -47,10 +47,10 @@ |
| |
| pmu { |
| compatible = "arm,armv8-pmuv3"; |
| - interrupts = <0 120 8>, |
| - <0 121 8>, |
| - <0 122 8>, |
| - <0 123 8>; |
| + interrupts = <0 170 4>, |
| + <0 171 4>, |
| + <0 172 4>, |
| + <0 173 4>; |
| interrupt-affinity = <&cpu0>, |
| <&cpu1>, |
| <&cpu2>, |
| -- |
| 2.7.4 |
| |
