blob: ad26079705002f2a64f14da747366fd532810cef [file] [log] [blame]
From 99200008f3ba7029d5d653a7b566811f5cd6ac27 Mon Sep 17 00:00:00 2001
From: Yinbo Zhu <yinbo.zhu@nxp.com>
Date: Fri, 13 Dec 2019 10:18:39 +0800
Subject: [PATCH] arm64: dts: ls1028a: fix endian setting for dcfg
commit 33eae7fb2e593fdbaac15d843e2558379c6d1149 upstream.
DCFG block uses little endian. Fix it so that register access becomes
correct.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Yangbo Lu <yangbo.lu@nxp.com>
Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 67f267c528c3..72946d42257d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -128,7 +128,7 @@
dcfg: syscon@1e00000 {
compatible = "fsl,ls1028a-dcfg", "syscon";
reg = <0x0 0x1e00000 0x0 0x10000>;
- big-endian;
+ little-endian;
};
rst: syscon@1e60000 {
--
2.7.4