blob: fc967cb8f958df19f0edea59edf82676871941d6 [file] [log] [blame]
From a8f60a4f60388e891429149a7dd1bf28c7113d34 Mon Sep 17 00:00:00 2001
From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Fri, 4 Oct 2019 16:27:28 +0200
Subject: [PATCH] arm64: dts: marvell: Fix CP110 NAND controller node
multi-line comment alignment
commit 2bc26088ba37d4f2a4b8bd813ee757992522d082 upstream.
Fix this tiny typo before renaming/changing this file.
Fixes: 72a3713fadfd ("arm64: dts: marvell: de-duplicate CP110 description")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index 4d6e4a097f72..eeaaaf188bd4 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -423,10 +423,10 @@
CP110_LABEL(nand_controller): nand@720000 {
/*
- * Due to the limitation of the pins available
- * this controller is only usable on the CPM
- * for A7K and on the CPS for A8K.
- */
+ * Due to the limitation of the pins available
+ * this controller is only usable on the CPM
+ * for A7K and on the CPS for A8K.
+ */
compatible = "marvell,armada-8k-nand-controller",
"marvell,armada370-nand-controller";
reg = <0x720000 0x54>;
--
2.7.4