| From c58eb7e0a3932e2653a70601cfd05ace2731a105 Mon Sep 17 00:00:00 2001 |
| From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| Date: Sat, 30 Nov 2019 19:53:37 +0100 |
| Subject: [PATCH] dt-bindings: reset: meson8b: fix duplicate reset IDs |
| |
| commit 4881873f4cc1460f63d85fa81363d56be328ccdc upstream. |
| |
| According to the public S805 datasheet the RESET2 register uses the |
| following bits for the PIC_DC, PSC and NAND reset lines: |
| - PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3) |
| - PSC is at bit 4 (meaning: RESET_VD_RMEM + 4) |
| - NAND is at bit 5 (meaning: RESET_VD_RMEM + 4) |
| |
| Update the reset IDs of these three reset lines so they don't conflict |
| with PIC_DC and map to the actual hardware reset lines. |
| |
| Fixes: 79795e20a184eb ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller") |
| Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| Signed-off-by: Kevin Hilman <khilman@baylibre.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/include/dt-bindings/reset/amlogic,meson8b-reset.h b/include/dt-bindings/reset/amlogic,meson8b-reset.h |
| index 614aff2c7aff..a03e86fe2c57 100644 |
| --- a/include/dt-bindings/reset/amlogic,meson8b-reset.h |
| +++ b/include/dt-bindings/reset/amlogic,meson8b-reset.h |
| @@ -95,9 +95,9 @@ |
| #define RESET_VD_RMEM 64 |
| #define RESET_AUDIN 65 |
| #define RESET_DBLK 66 |
| -#define RESET_PIC_DC 66 |
| -#define RESET_PSC 66 |
| -#define RESET_NAND 66 |
| +#define RESET_PIC_DC 67 |
| +#define RESET_PSC 68 |
| +#define RESET_NAND 69 |
| #define RESET_GE2D 70 |
| #define RESET_PARSER_REG 71 |
| #define RESET_PARSER_FETCH 72 |
| -- |
| 2.7.4 |
| |
