| From 674404360f8895eaa8f8b2ff5a9ccaeb073217e4 Mon Sep 17 00:00:00 2001 |
| From: Lu Baolu <baolu.lu@linux.intel.com> |
| Date: Tue, 23 Jun 2020 07:13:40 +0800 |
| Subject: [PATCH] iommu/vt-d: Make Intel SVM code 64-bit only |
| |
| commit 9486727f5981a5ec5c0b699fb1777451bd6786e4 upstream. |
| |
| Current Intel SVM is designed by setting the pgd_t of the processor page |
| table to FLPTR field of the PASID entry. The first level translation only |
| supports 4 and 5 level paging structures, hence it's infeasible for the |
| IOMMU to share a processor's page table when it's running in 32-bit mode. |
| Let's disable 32bit support for now and claim support only when all the |
| missing pieces are ready in the future. |
| |
| Fixes: 1c4f88b7f1f92 ("iommu/vt-d: Shared virtual address in scalable mode") |
| Suggested-by: Joerg Roedel <jroedel@suse.de> |
| Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> |
| Link: https://lore.kernel.org/r/20200622231345.29722-2-baolu.lu@linux.intel.com |
| Signed-off-by: Joerg Roedel <jroedel@suse.de> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig |
| index 83664db5221d..c255fc8c7f8a 100644 |
| --- a/drivers/iommu/Kconfig |
| +++ b/drivers/iommu/Kconfig |
| @@ -204,7 +204,7 @@ config INTEL_IOMMU_DEBUGFS |
| |
| config INTEL_IOMMU_SVM |
| bool "Support for Shared Virtual Memory with Intel IOMMU" |
| - depends on INTEL_IOMMU && X86 |
| + depends on INTEL_IOMMU && X86_64 |
| select PCI_PASID |
| select MMU_NOTIFIER |
| help |
| -- |
| 2.27.0 |
| |