| From 0edfebbef0ddef7b2db1a26b9092ae4267040094 Mon Sep 17 00:00:00 2001 |
| From: Sean Christopherson <sean.j.christopherson@intel.com> |
| Date: Tue, 7 Jan 2020 16:12:10 -0800 |
| Subject: [PATCH] KVM: x86/mmu: Apply max PA check for MMIO sptes to 32-bit KVM |
| |
| commit e30a7d623dccdb3f880fbcad980b0cb589a1da45 upstream. |
| |
| Remove the bogus 64-bit only condition from the check that disables MMIO |
| spte optimization when the system supports the max PA, i.e. doesn't have |
| any reserved PA bits. 32-bit KVM always uses PAE paging for the shadow |
| MMU, and per Intel's SDM: |
| |
| PAE paging translates 32-bit linear addresses to 52-bit physical |
| addresses. |
| |
| The kernel's restrictions on max physical addresses are limits on how |
| much memory the kernel can reasonably use, not what physical addresses |
| are supported by hardware. |
| |
| Fixes: ce88decffd17 ("KVM: MMU: mmio page fault support") |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> |
| Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c |
| index f95ff4940a0d..6eeac7e5d2b2 100644 |
| --- a/arch/x86/kvm/x86.c |
| +++ b/arch/x86/kvm/x86.c |
| @@ -7046,7 +7046,7 @@ static void kvm_set_mmio_spte_mask(void) |
| * If reserved bit is not supported, clear the present bit to disable |
| * mmio page fault. |
| */ |
| - if (IS_ENABLED(CONFIG_X86_64) && shadow_phys_bits == 52) |
| + if (shadow_phys_bits == 52) |
| mask &= ~1ull; |
| |
| kvm_mmu_set_mmio_spte_mask(mask, mask); |
| -- |
| 2.7.4 |
| |
