| From 2a6771790780693cc964104cec403b683f56d633 Mon Sep 17 00:00:00 2001 |
| From: Jerome Brunet <jbrunet@baylibre.com> |
| Date: Fri, 13 Dec 2019 11:33:04 +0100 |
| Subject: [PATCH] clk: meson: g12a: fix missing uart2 in regmap table |
| |
| commit b1b3f0622a9d52ac19a63619911823c89a4d85a4 upstream. |
| |
| UART2 peripheral is missing from the regmap fixup table of the g12a family |
| clock controller. As it is, any access to this clock would Oops, which is |
| not great. |
| |
| Add the clock to the table to fix the problem. |
| |
| Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller") |
| Reported-by: Dmitry Shmidt <dimitrysh@google.com> |
| Tested-by: Dmitry Shmidt <dimitrysh@google.com> |
| Acked-by: Neil Armstrong <narmstrong@baylibre.com> |
| Tested-by: Kevin Hilman <khilman@baylibre.com> |
| Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c |
| index 206fafd299ea..373fd2980f2b 100644 |
| --- a/drivers/clk/meson/g12a.c |
| +++ b/drivers/clk/meson/g12a.c |
| @@ -2819,6 +2819,7 @@ static struct clk_regmap *const g12a_clk_regmaps[] = { |
| &g12a_bt656, |
| &g12a_usb1_to_ddr, |
| &g12a_mmc_pclk, |
| + &g12a_uart2, |
| &g12a_vpu_intr, |
| &g12a_gic, |
| &g12a_sd_emmc_a_clk0, |
| -- |
| 2.7.4 |
| |
