| From a2244f09807502350e1b702620bd52349caad641 Mon Sep 17 00:00:00 2001 |
| From: Thomas Gleixner <tglx@linutronix.de> |
| Date: Fri, 3 Jul 2009 08:44:52 -0500 |
| Subject: [PATCH] x86: PAE preempt-rt fix |
| |
| commit dabac300b124a630d2521f3cbf510b194f1aaba8 in tip. |
| |
| Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
| |
| diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h |
| index 177b016..0e989a1 100644 |
| --- a/arch/x86/include/asm/pgtable-3level.h |
| +++ b/arch/x86/include/asm/pgtable-3level.h |
| @@ -71,6 +71,7 @@ static inline void pud_clear(pud_t *pudp) |
| { |
| unsigned long pgd; |
| |
| + preempt_disable(); |
| set_pud(pudp, __pud(0)); |
| |
| /* |
| @@ -86,6 +87,7 @@ static inline void pud_clear(pud_t *pudp) |
| if (__pa(pudp) >= pgd && __pa(pudp) < |
| (pgd + sizeof(pgd_t)*PTRS_PER_PGD)) |
| write_cr3(pgd); |
| + preempt_enable(); |
| } |
| |
| #ifdef CONFIG_SMP |
| diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c |
| index ed34f5e..c2ea747 100644 |
| --- a/arch/x86/mm/pgtable.c |
| +++ b/arch/x86/mm/pgtable.c |
| @@ -132,6 +132,7 @@ void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) |
| reserved at the pmd (PDPT) level. */ |
| set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT)); |
| |
| + preempt_disable(); |
| /* |
| * According to Intel App note "TLBs, Paging-Structure Caches, |
| * and Their Invalidation", April 2007, document 317080-001, |
| @@ -140,6 +141,7 @@ void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) |
| */ |
| if (mm == current->active_mm) |
| write_cr3(read_cr3()); |
| + preempt_enable(); |
| } |
| #else /* !CONFIG_X86_PAE */ |
| |
| -- |
| 1.7.1.1 |
| |