advsync/WriteBarrierOrdering.fig

#FIG 3.2
Landscape
Center
Inches
A4
100.00
Single
-2
1200 2
0 32 #efefef
0 33 #7f7f7f
2 1 2 1 33 7 52 -1 -1 1.000 0 0 -1 0 0 2
	 1035 1170 1035 1470
2 1 2 1 33 7 52 -1 -1 1.000 0 0 -1 0 0 2
	 1035 330 1035 870
2 2 0 1 0 7 50 -1 19 0.000 0 0 -1 0 0 5
	 45 60 45 1740 765 1740 765 60 45 60
4 1 0 49 -1 0 10 0.000 4 2 720 405 840 CPU 1\001
2 2 0 0 32 7 51 -1 45 0.000 0 0 -1 0 0 5
	 1485 60 1485 1740 2115 1740 2115 60 1485 60
2 1 0 1 33 7 50 -1 -1 1.000 0 0 -1 0 0 6
	 1485 60 1485 96 1462 108 1507 126 1485 144 1485 180
2 1 0 1 33 7 50 -1 -1 1.000 0 0 -1 0 0 6
	 2115 60 2115 96 2092 108 2137 126 2115 144 2115 180
2 2 0 1 0 7 50 -1 19 0.000 0 0 -1 0 0 5
	 1485 180 1485 420 2115 420 2115 180 1485 180
4 1 0 49 -1 0 10 0.000 4 2 630 1800 360 C=3\001
2 2 0 1 0 7 50 -1 19 0.000 0 0 -1 0 0 5
	 1485 420 1485 660 2115 660 2115 420 1485 420
4 1 0 49 -1 0 10 0.000 4 2 630 1800 600 A=1\001
2 2 0 1 0 7 50 -1 19 0.000 0 0 -1 0 0 5
	 1485 660 1485 900 2115 900 2115 660 1485 660
4 1 0 49 -1 0 10 0.000 4 2 630 1800 840 B=2\001
2 1 0 1 33 7 50 -1 -1 1.000 0 0 -1 0 0 6
	 1485 900 1485 936 1462 948 1507 966 1485 984 1485 1020
2 1 0 1 33 7 50 -1 -1 1.000 0 0 -1 0 0 6
	 2115 900 2115 936 2092 948 2137 966 2115 984 2115 1020
4 1 0 50 -1 12 10 0.000 4 2 1440 1800 1110 wwwwwwwwwwwwwwww\001
2 2 0 1 0 7 50 -1 19 0.000 0 0 -1 0 0 5
	 1485 1140 1485 1380 2115 1380 2115 1140 1485 1140
4 1 0 49 -1 0 10 0.000 4 2 630 1800 1320 E=5\001
2 2 0 1 0 7 50 -1 19 0.000 0 0 -1 0 0 5
	 1485 1380 1485 1620 2115 1620 2115 1380 1485 1380
4 1 0 49 -1 0 10 0.000 4 2 630 1800 1560 D=4\001
2 1 0 1 33 7 50 -1 -1 1.000 0 0 -1 0 0 6
	 1485 1620 1485 1656 1462 1668 1507 1686 1485 1704 1485 1740
2 1 0 1 33 7 50 -1 -1 1.000 0 0 -1 0 0 6
	 2115 1620 2115 1656 2092 1668 2137 1686 2115 1704 2115 1740
3 2 0 2 0 7 52 -1 -1 0.000 0 0 0 3
 2610 210 2654 525 2610 840
	 0.000 -1.000 0.000
2 1 0 2 0 7 52 -1 -1 0.000 0 0 -1 0 0 3
	 2610 840 2700 900 2610 960
3 2 0 2 0 7 52 -1 -1 0.000 0 0 0 3
 2610 960 2654 1275 2610 1590
	 0.000 -1.000 0.000
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
	1 1 0.00 60.000 120.000
	 1755 2340 1755 1740
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
	1 1 0.00 60.000 120.000
	 1485 1500 765 1500
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
	1 1 0.00 60.000 120.000
	 2925 1020 3375 1020
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 6
	1 1 0.00 60.000 120.000
	 2655 420 3105 420 3240 240 3510 600 3645 420 4185 420
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 1 2
	1 1 0.00 60.000 120.000
	 1485 300 765 300
4 0 0 49 -1 12 10 0.000 4 120 4050 1890 2040 Sequence in which stores are committed to the\001
4 0 0 49 -1 12 10 0.000 4 120 1980 1890 2160 memory system by CPU 1\001
4 0 0 49 -1 12 10 0.000 4 120 2790 3420 1080 At this point the write barrier\001
4 0 0 49 -1 12 10 0.000 4 120 2880 3420 1200 requires all stores prior to the\001
4 0 0 49 -1 12 10 0.000 4 120 2700 3420 1320 barrier to be committed before\001
4 0 0 49 -1 12 10 0.000 4 120 2970 3420 1440 further stores may take place.\001
4 0 0 49 -1 12 10 0.000 4 120 1620 4230 480 Events perceptible\001
4 0 0 49 -1 12 10 0.000 4 120 1530 4230 600 to rest of system\001