ARM / mach-shmobile: Invalidate caches when booting secondary cores

Make sure L1 caches are invalidated when booting secondary
cores. Needed to boot all mach-shmobile SMP systems that
are using Cortex-A9 including sh73a0, r8a7779 and EMEV2.

Thanks to imx and tegra guys for actual code.

Signed-off-by: Magnus Damm <>
Tested-by: Kuninori Morimoto <>
Signed-off-by: Rafael J. Wysocki <>
1 file changed