| 0e29eb9d9160 ("drm/i915/dsi: Move logging of DSI VBT parameters to a helper function") |
| dee2370ce3d1 ("drm/i915: Adjust DSI fixed mode handling") |
| 972d607c59ed ("drm/i915/icl: Fill DSI ports info") |
| e27580487321 ("drm/i915/icl: Allocate DSI encoder/connector") |
| bf4d57ff4110 ("drm/i915/icl: Find DSI presence for ICL") |
| 4769b598b943 ("drm/i915/icl: Put DSI link in ULPS") |
| 522cc3f717ac ("drm/i915/icl: Power down DSI panel") |
| 4e123bd3039d ("drm/i915/icl: Disable DSI transcoders") |
| d9d996b6ca43 ("drm/i915/icl: Turn OFF panel backlight") |
| bfee32bfca82 ("drm/i915/icl: Set max return packet size for DSI panel") |
| d1aeb5f399d9 ("drm/i915/icl: Configure DSI transcoder timings") |
| 70f4f502c47e ("drm/i915/icl: Program TRANS_DDI_FUNC_CTL registers") |
| d364dc66e2d5 ("drm/i915/icl: Configure DSI transcoders") |
| ca8fc99f2ac1 ("drm/i915/icl: Get DSI transcoder for a given port") |
| e72cce531017 ("drm/i915/icl: Program DSI clock and data lane timing params") |
| b687c1984c4f ("drm/i915/icl: Make common DSI functions available") |
| 67551a703544 ("drm/i915/dsi: abstract dphy parameter init") |
| 2bf3f59daeee ("drm/i915/dsi: refactor bitrate calculations in intel_dsi_vbt_init()") |
| 70a7b83628fa ("drm/i915/icl: Program T_INIT_MASTER registers") |
| ba3df888be90 ("drm/i915/icl: Enable DDI Buffer") |
| 3f4b9d9d02c6 ("drm/i915/icl: DSI vswing programming sequence") |
| fc41001d9708 ("drm/i915/icl: Configure lane sequencing of combo phy transmitter") |
| 45f09f7adc8a ("drm/i915/icl: Power down unused DSI lanes") |
| b1cb21a5f1c6 ("drm/i915/icl: Enable DSI IO power") |
| fcfe0bdcb191 ("drm/i915/icl: Program DSI Escape clock Divider") |
| ca3589c11815 ("drm/i915/dsi: rename the current DSI files based on first platform") |
| 27efd2566cb8 ("drm/i915/icl: Define register for DSI PLL") |
| 00c92d929ac3 ("drm/i915/icl: unconditionally init DDI for every port") |
| d93fa1b47b8f ("Revert "drm/i915/edp: Allow alternate fixed mode for eDP if available."") |
| a49714531be3 ("drm/i915/dp: fix compliance test adjustments") |
| 3acd115d08f7 ("drm/i915/dp: abstract link config selection") |
| 7c2781e41ec8 ("drm/i915/dp: group link config limits in a struct") |
| ef32659a78df ("drm/i915/dp: move eDP VBT bpp clamping code to intel_dp_compute_bpp()") |
| 981a63eb2725 ("drm/i915/dp: abstract dp link config computation from the rest") |
| dd519418f513 ("drm/i915/dp: move link_bw and rate_select debugging where used") |
| 87251120553c ("drm/i915/dp: remove stale comment about bw constants") |
| 09a28bd9e802 ("drm/i915: Move display related definitions to dedicated header") |
| b74eeeb6b1ab ("drm/i915: Move some utility functions to i915_util.h") |
| b68763741aa2 ("drm/i915: Restore GT performance in headless mode with DMC loaded") |
| 050213893307 ("drm/i915: Interlaced DP output doesn't work on VLV/CHV") |
| 20ff39fa4312 ("drm/i915: Disable DP audio for g4x") |
| dd57602efbce ("drm/i915: Switch fbc over to for_each_new_intel_plane_in_state()") |
| ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/") |
| b1e01595a66d ("drm/i915: Redo plane sanitation during readout") |
| 51f5a0963984 ("drm/i915: Add .get_hw_state() method for planes") |
| 8f4f27970723 ("drm/i915: Nuke intel_digital_port->port") |
| adc103047e58 ("drm/i915: Eliminate some encoder->crtc usage from DP code") |
| 436009b578ab ("drm/i915/cnl: Force DDI_A_4_LANES when needed.") |
| 081dfcfafcbb ("drm/i915: Pass the encoder type explicitly to skl_set_iboost()") |
| 975786ee0e25 ("drm/i915: Extract intel_ddi_get_buf_trans_hdmi()") |
