| 27dbefb911f2 ("drm/i915/dp: read sink count to a temporary variable first") |
| 010b9b397b32 ("drm/i915/dp: use readb and writeb calls for single byte DPCD access") |
| 68f357cb7347 ("drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4") |
| 55cfc5808096 ("drm/i915/dp: cache source rates at init") |
| d7e8ef02a6b3 ("drm/i915/dp: Reset the link params on HPD/connected boot/resume") |
| 611032bfa71a ("drm/i915: Add support for DP Video pattern compliance tests") |
| b48a5ba9710f ("drm/i915: Fixes to support DP Compliance EDID tests") |
| b976dc53ec43 ("drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.") |
| 8da53efaa228 ("drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.") |
| 8727dc090284 ("drm/i915: Expand is_lp backwards to gen8_lp and gen7_lp.") |
| 9f2bdb006a7e ("drm/i915: Prevent PPS stealing from a normal DP port on VLV/CHV") |
| c1617abc48a0 ("drm/i915: Move all the DP compliance data to a separate struct") |
| f482984acb10 ("drm/i915: Compute sink's max lane count/link BW at Hotplug") |
| cc3f90f0633c ("drm/i915/glk: Reuse broxton code for geminilake") |
| 3e4274f86e73 ("drm/i915/glk: Add a IS_GEN9_LP() macro") |
| 80fa66b6ad2b ("drm/i915: Create a common GEN9_LP_FEATURE.") |
| c39055b072f8 ("drm/i915: Pass dev_priv to intel_setup_outputs()") |
| 6315b5d33a8f ("drm/i915: dev_priv cleanup in intel_display.c") |
| 29b74b7f17ab ("drm/i915: dev_priv cleanup in i915_suspend.c") |
| 275a991c038a ("drm/i915: dev_priv cleanup in i915_gem_gtt.c") |
| 3975797f3e72 ("Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued") |
