| 3ed347d1a73e ("drm/i915/tc: Catch TC users accessing FIA registers without enable aux") |
| feb7e0ef5ff8 ("drm/i915/tc/icl: Implement TC cold sequences") |
| f8bb28e63a1e ("drm/i915/display: Split hsw_power_well_enable() into two") |
| 8afb292839bb ("drm/i915/display/tc: Make WARN* drm specific where drm_priv ptr is available") |
| d6e53851ecc8 ("drm/i915/display_power: use intel_de_*() functions for register access") |
| 569caa65a495 ("drm/i915/power: convert to struct drm_device macros in display/intel_display_power.c") |
| b69fa3610b15 ("drm/i915/icl: Cleanup combo PHY aux power well handlers") |
| 3fa01d642fa7 ("drm/i915/tgl: Program BW_BUDDY registers during display init") |
| 4645e906f2d4 ("drm/i915/tgl: Enable DC3CO state in "DC Off" power well") |
| 19c79ff82b4a ("drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask") |
| 3b51be4e4061 ("drm/i915/tc: Update DP_MODE programming") |
| 27ffe6e570aa ("drm/i915/tgl: Check the UC health of tc controllers after power on") |
| 8aaf5cbda8f1 ("drm/i915/icl: Unify disable and enable phy clock gating functions") |
| 31d9ae9d7342 ("drm/i915/tgl: Finish modular FIA support on registers") |
| a6e58d9a2e04 ("drm/i915/dsb: Check DSB engine status.") |
| 061489c65ff5 ("drm/i915/dsb: single register write function for DSB.") |
| 67f3b58f3bac ("drm/i915/dsb: DSB context creation.") |
| 8a84bacba19c ("drm/i915: Align power domain names with port names") |
| 99389390fef5 ("drm/i915/tgl: Implement TGL DisplayPort training sequence") |
| 4cb3b44d6b71 ("drm/i915: Wrappers for display register waits") |
| 3e5d0641e896 ("drm/i915: Move i915_power_well_id out of i915_reg.h") |
| 015341da9888 ("drm/i915/tgl: Fixing up list of PG3 power domains.") |
| 9c9082b98228 ("drm/i915: extract i915_memcpy.h from i915_drv.h") |
| db94e9f133a0 ("drm/i915: extract i915_perf.h from i915_drv.h") |
| 26f00514d944 ("drm/i915: Isolate i915_getparam_ioctl()") |
| 9ae06cad821b ("drm/i915: Use intel_engine_lookup_user for probing HAS_BSD etc") |
| 071b68cceee7 ("drm/i915: abstract display suspend/resume operations") |
| 1c0023d4f5fd ("drm/i915: move property enums to intel_display_types.h") |
| 1d455f8de8e8 ("drm/i915: rename intel_drv.h to display/intel_display_types.h") |
| a09d9a800236 ("drm/i915: avoid including intel_drv.h via i915_drv.h->i915_trace.h") |
| 3e1876251bc3 ("drm/i915: move intel_display.c function declarations") |
| 750e76b4f9f6 ("drm/i915/gt: Move the [class][inst] lookup for engines onto the GT") |
| c29579d2fabe ("drm/i915/gem: Make caps.scheduler static") |
| b40d73784ffc ("drm/i915: Replace struct_mutex for batch pool serialisation") |
| 51fbd8de87dc ("drm/i915/pmu: Atomically acquire the gt_pm wakeref") |
| 08ce5c64b25d ("drm/i915/pmu: Convert sampling to gt") |
| 28fba0961de4 ("drm/i915/pmu: Convert engine sampling to uncore mmio") |
| 908091c85003 ("drm/i915/pmu: Make more struct i915_pmu centric") |
| 98a5c2a3582a ("drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization") |
| 5cca503817d0 ("drm/i915/perf: Initialise err to 0 before looping over ce->engines") |
| a9877da2d629 ("drm/i915/oa: Reconfigure contexts on the fly") |
| a8120bc23eea ("drm/i915/uc: kill <g,h>uc_to_i915") |
| 2239e6dff206 ("drm/i915/guc: prefer intel_gt in guc interrupt functions") |
| 8b5689d7e3ca ("drm/i915/uc: move GuC/HuC inside intel_gt under a new intel_uc") |
| 0f261b241d9c ("drm/i915/uc: move GuC and HuC files under gt/uc/") |
| 633023a4e618 ("drm/i915/guc: unify guc irq handling") |
| 9cbd51c2c0ed ("drm/i915/guc: move guc irq functions to intel_guc parameter") |
| bb2881f8bdde ("drm/i915/uc: introduce intel_uc_fw_supported") |
| e3f503f1c733 ("drm/i915/uc: replace uc init/fini misc") |
| a30eff49d08c ("drm/i915/guc: Use system workqueue for log capture") |
