| 4361ccac2810 ("drm/i915/icl: Fix AUX-B HW not done issue w/o AUX-A") |
| c45198b163fb ("drm/i915/cnl+: Move the combo PHY init/uninit code to a new file") |
| 1e0e9c8a85af ("drm/i915/icl: Fix combo PHY uninit") |
| d72e84ccba20 ("drm/i915/icl: Combine all port/combophy macros at one place") |
| 360fa66ae857 ("drm/i915: rename intel_modes.c to intel_connector.c") |
| 166869b390b6 ("drm/i915/icl: Define PORT_CL_DW_10 register") |
| f0d759f038dc ("drm/i915: Mark expected switch fall-throughs") |
| 67ca07e7ac10 ("drm/i915/icl: Add power well support") |
| 9378985eb05c ("drm/i915/icl: implement DVFS for ICL") |
| 521370106d0d ("drm/i915: Change i915_gem_fault() to return vm_fault_t") |
| 51c83cfaf963 ("drm/i915/icl: Get DDI clock for ICL based on PLLs.") |
| a2bc69a1a9d6 ("drm/i915/icl: Add register definition for DFLEXDPMLE") |
| 145ef0d17d57 ("drm/i915/icl: compute the MG PLL registers") |
| c27e917e2bda ("drm/i915/icl: add basic support for the ICL clocks") |
| 957d32feaf04 ("drm/i915/stolen: Deduce base of reserved portion as top-size on vlv") |
| 0efb656147e0 ("drm/i915/stolen: Checkpatch cleansing") |
| 4635b573634c ("drm/i915/cnl; Add macro to get PORT_TX register") |
| bba73071b6f7 ("Merge drm-next into drm-intel-next-queued (this time for real)") |
