| 4e53840fdfdd ("drm/i915/icl: Introduce new macros to get combophy registers") |
| d72e84ccba20 ("drm/i915/icl: Combine all port/combophy macros at one place") |
| d61d1b3bbba1 ("drm/i915/icl: Define AUX lane registers for Port A/B") |
| 166869b390b6 ("drm/i915/icl: Define PORT_CL_DW_10 register") |
| 67ca07e7ac10 ("drm/i915/icl: Add power well support") |
| 9e8789ec967a ("drm/i915/i915_reg.h: fix the checkpatch MACRO_ARG_PRECEDENCE issues") |
| 5ee8ee86c86f ("drm/i915/i915_reg.h: fix the checkpatch SPACING issues") |
| 2edd53272120 ("drm/i915/dp: Add support for HBR3 and TPS4 during link training") |
| a2bc69a1a9d6 ("drm/i915/icl: Add register definition for DFLEXDPMLE") |
| b99b9ec1d374 ("drm/i915: Clean up cursor defines") |
| eade6c894498 ("drm/i915: Have plane->get_hw_state() return the current pipe") |
| 77312ae8f071 ("drm/i915/psr: vbt change for psr") |
| c894d63c6b36 ("drm/i915/icl: Disable pipe CSC and gamma in cursor plane") |
| 59b74c497ae4 ("drm/i915: Clean up DP pipe select bits") |
| f67dc6d8869f ("drm/i915: Parametrize TRANS_DP_PORT_SEL") |
| b752e995829e ("drm/i915: Check for IVB instead of gen7 when we think about IVB CPU eDP") |
| 762034675ee7 ("drm/i915: Clean up SDVO pipe select bits") |
| a44628b9293b ("drm/i915: Clean up LVDS pipe select bits") |
| 6102a8ee8ad6 ("drm/i915: Clean up ADPA pipe select bits") |
| cc38cae7c4e9 ("drm/i915/icl: Introduce initial Icelake Workarounds") |
| 53f071e19d56 ("Merge drm/drm-next into drm-intel-next-queued") |