| 5114e96cb27e ("iommu/arm-smmu: Convert GR1 registers to bitfields") |
| 2b03774bae5f ("iommu/arm-smmu: Split out register defines") |
| 8513c8930069 ("iommu/arm-smmu: Poll for TLB sync completion more effectively") |
| 11febfca2419 ("iommu/arm-smmu: Use per-context TLB sync as appropriate") |
| 452107c79035 ("iommu/arm-smmu: Tidy up context bank indexing") |
| 280b683ceace ("iommu/arm-smmu: Simplify ASID/VMID handling") |
| 8d2932dd0634 ("Merge branches 'iommu/fixes', 'arm/exynos', 'arm/renesas', 'arm/smmu', 'arm/mediatek', 'arm/core', 'x86/vt-d' and 'core' into next") |
