| 593f79a236e1 ("drm/amdgpu/display: check if fbc is available in set_static_screen_control (v2)") |
| 5099114ba3b2 ("drm/amdgpu/display: drop DRM_AMD_DC_FBC kconfig option") |
| 87ac8fb08bc7 ("drm/amd/display: disable FBC on underlay pipe") |
| 2fa417324abd ("drm/amd/display: Remove PRE_VEGA flag") |
| 6da2b9332c57 ("amdgpu/dm: Default PRE_VEGA ASIC support to 'y'") |
| 1296423bf23c ("drm/amd/display: define DC_LOGGER for logger") |
| 2f3fd67a8af2 ("drm/amd/display: Use MACROS instead of dm_logger") |
| fdf0c1c2f75e ("drm/amd/display: Add logging for aux DPCD access") |
| 3e332d3a5a64 ("drm/amd/display: Make FBC work without fbdev emulation") |
| 4cac1e6d2ffa ("drm/amd/display: Keep eDP stream enabled during boot.") |
| 91d4a1290034 ("drm/amd/display: boot up/S4 fix mainlink off before BL.") |
| c5fc7f59a71a ("drm/amd/display: resume from S3 bypass power down HW block.") |
| 24a30505f312 ("drm/amd/display: Check hubp in pipe_ctx not in res_pool.") |
| ac916c914c31 ("drm/amd/display: Remove return when no EDID read.") |
| 367e66870e9c ("drm/amdgpu: remove DC special casing for KB/ML") |
| cf1835f03ffb ("drm/amd/display: fix backlight not off at resume from S4") |
| 31aec354f92c ("drm/amd/display: Implement interface for CRC on CRTC") |
| 405c50a07d3f ("drm/amd/display: Fix check for setting input TF") |
| c7e74f49598d ("drm/amd/display: Log which clocks are unsupported") |
| e07f541f50a3 ("drm/amd/display: Use real BE and FE index to program regs.") |
| c8242b9858ae ("drm/amd/display: Move hubp reg access from hwss to hubp module.") |
| 25292028d74b ("drm/amd/display: Disable eDP with a proper sequence.") |
| 91178796ba17 ("drm/amd/display: disable eDP backlight for extend monitor only reboot use case.") |
| 42e67c3b3c4a ("drm/amd/display: make FBC mem alloc dynamic") |
| 39f26499c6ff ("drm/amd/display: Put dcn_mi_registers with other structs") |
| 4b8240bf916f ("drm/amd/display: hubp refactor") |
| 36192e7e5703 ("drm/amd/display: Update HUBP") |
| 23bfb33181d2 ("drm/amd/display: Fix check for whether dmcu fw is running") |
| f23d558466cf ("drm/amd/display: Move OPP mpc tree initialization to hw_init") |
| a018298ff850 ("drm/amd/display: Add disclaimer to BW and DML code provided by HW") |
| 3f4e3a282e12 ("drm/amd/display: Use macro for isnan check") |
| cc55b1f5c31a ("drm/amd/display: Set mpcc_disconnect_pending during MPC reset") |
| 4e1c1875c79b ("drm/amd/display: Reset MPCC muxes during init") |
| 5cc2687c13ee ("drm/amd/display: Implement work around for optc underflow.") |
| 4010472575f4 ("drm/amd/display: Add optimized_required flag") |
| 1ccda80ff454 ("drm/amd/display: Use same wait mpcc idle function.") |
| feb4a3cd8eb0 ("drm/amd/display: Integrating MPC pseudocode") |
| 621fd3e39fc0 ("drm/amd/display: Set OPP default values in init_hw") |
| 404dfe1c5644 ("drm/amd/display: DMCU and ABM maintenance and refactor") |
| 8980aa3c9ed6 ("drm/amd/display: Only program watermark for full update.") |
| 26247e77790c ("drm/amd/display: fix mpo validation failure") |
| 4a43586bac9a ("drm/amd/display: update output csc matrix values") |
| 675634c5aba3 ("drm/amd/display: Only update output transfer function for full type.") |
| 480bd0cf450b ("drm/amd/display: Update dchub and dpp as per update flags.") |
| afbeb2638b0a ("drm/amd/display: call set_mpc_output_csc from hwsequencer") |
| 4f42a2dd3d7e ("drm: amd: Fix line continuation formats") |
| 671b00e26c6c ("drm/amd/display: Fix use before initialize warning") |
| 2a06e0a5a491 ("drm/amd/display: Remove unnecessary dc_stream vtable") |
| 7c0c96720959 ("drm/amd/display: Move dc_stream interface to separate header") |
| a4e6d14ebe80 ("drm/amd/display: Optimize front end programming.") |
