| 64600bd5b828 ("drm/i915: Start tracking voltage level in the cdclk state") |
| b0587e4d20dc ("drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cdclk() hook") |
| 63ff30442519 ("drm/i915: Nuke the VLV/CHV PFI programming power domain workaround") |
| 1a5301a58e5f ("drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk()") |
| 83c5fda74f98 ("drm/i915: Pass the cdclk state to the set_cdclk() functions") |
| 3d5dbb10f34a ("drm/i915: Pass dev_priv to remainder of the cdclk functions") |
| bb0f4aab0e76 ("drm/i915: Track full cdclk state for the logical and actual cdclk frequencies") |
| 49cd97a35d90 ("drm/i915: Start moving the cdclk stuff into a distinct state structure") |
| 8f0cfa4d2a62 ("drm/i915: Pass computed vco to bxt_set_cdclk()") |
| 7ff89ca21358 ("drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c") |
| 4717e8bb7341 ("drm/i915: Clean up the .get_cdclk() assignment if ladder") |
| c49a0d054a05 ("drm/i915: s/get_display_clock_speed/get_cdclk/") |
| 4e841ecd4e18 ("drm/i915: Nuke intel_mode_max_pixclk()") |
| a7d1b3f41a2d ("drm/i915: Store the pipe pixel rate in the crtc state") |
| 6248017ae530 ("drm/i915: Get correct display clock on 945gm") |
| b976dc53ec43 ("drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.") |
| 8da53efaa228 ("drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.") |
| 31bb2ef97ea9 ("drm/i915: Check for NULL atomic state in intel_crtc_disable_noatomic()") |
| a8cd6da0c0d5 ("drm/i915: Remove crtc->config usage from intel_modeset_readout_hw_state()") |
| 1d4258db3e0b ("drm/i915: Remove useless casts to intel_plane_state") |
| ef426c103892 ("Merge tag 'drm-misc-next-2016-12-30' of git://anongit.freedesktop.org/git/drm-misc into drm-intel-next-queued") |